component
MCP4251-104E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMCP4251-104E
Microchip Tech · Digital Potentiometers · TSSOP-14
MCP4251-104E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | SPI chip select input: forcing CS to VIL enables serial commands and forcing it to VIHH enables high-voltage serial commands; the input is high-voltage tolerant with Schmitt trigger and up to 12.5V. |
| 2 | SCK | input | SPI serial clock input (10 MHz, SPI modes 0,0 and 1,1), high-voltage tolerant with Schmitt trigger and an internal smart weak pull-up. |
| 3 | SDI | input | SPI serial data input, connected to the host controller's SDO pin; high-voltage tolerant with Schmitt trigger input. |
| 4 | VSS | power_in | Device ground reference; terminal voltages on all potentiometer terminals must be between VSS and VDD. |
| 5 | P1B | passive | Potentiometer 1 terminal B, the fixed connection to the zero-scale wiper value (0x00); the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 6 | P1W | passive | Potentiometer 1 wiper terminal; the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 7 | P1A | passive | Potentiometer 1 terminal A, the fixed connection to the full-scale wiper value (0x100 for 8-bit devices); the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 8 | P0A | passive | Potentiometer 0 terminal A, the fixed connection to the full-scale wiper value (0x100 for 8-bit devices); the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 9 | P0W | passive | Potentiometer 0 wiper terminal; the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 10 | P0B | passive | Potentiometer 0 terminal B, the fixed connection to the zero-scale wiper value (0x00); the voltage must be between VSS and VDD and it can carry positive or negative current. |
| 11 | NC | unconnected | No internal connection; the datasheet recommends connecting it to VDD or VSS to reduce possible noise coupling. |
| 12 | SHDN | input | Hardware shutdown input that forces the resistor network terminals into the hardware shutdown state; high-voltage tolerant with Schmitt trigger input. |
| 13 | SDO | output | SPI serial data output connected to the host controller's SDI pin, used to read wiper/TCON/status registers; it is an open-drain output using the internal smart pull-up, so external pull-up resistors can increase its rate. |
| 14 | VDD | power_in | Positive power supply input referenced to VSS; the operating range is 1.8V to 5.5V, and electrical performance may not meet the data sheet specifications while VDD is below 2.7V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | Data Acquisition |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Resistance RAB (±20%, -104 devices) | RAB | 80 | 100 | 120 | kΩ | -104 devices (Note 1) | 5 |
| Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply Voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial Interface only. | 4 | |
| Operating Temperature Range | TA | -40 | 125 | °C | 14 | ||
| Wiper Resistance (RW) | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper Resistance (RW) | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Nominal Resistance Match (MCP42X1) | /RAB0 - RAB1/ / RAB | 0.2 | 1.25 | % | MCP42X1 devices only | 5 | |
| Maximum current through A, W or B | IW | 2.5 | mA | Worst case current through wiper at full or zero scale (Note 6) | 5 | ||
| Full-Scale Error (MCP4XX1) | VWFSE | -0.5 | -0.1 | LSb | 100 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Zero-Scale Error (MCP4XX1) | VWZSE | 0.1 | 0.5 | LSb | 100 kΩ 8-bit 3.0V ≤ VDD ≤ 5.5V | 6 | |
| Potentiometer Integral Non-linearity | INL | -1 | 0.5 | 1 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V; MCP4XX1 devices only (Note 2) | 6 |
| Potentiometer Differential Non-linearity | DNL | -0.5 | 0.25 | 0.5 | LSb | 8-bit 3.0V ≤ VDD ≤ 5.5V; MCP4XX1 devices only (Note 2) | 6 |
| Rheostat Integral Non-linearity | R-INL | -1 | 0.5 | 1 | LSb | 100 kΩ 8-bit 5.5V, IW = 45 µA | 7 |
| Rheostat Integral Non-linearity | R-INL | -1.5 | 0.25 | 1.5 | LSb | 100 kΩ 8-bit 3.0V, IW = 24 µA (Note 7) | 7 |
| Rheostat Differential Non-linearity | R-DNL | -0.5 | 0.25 | 0.5 | LSb | 100 kΩ 8-bit 5.5V, IW = 45 µA | 8 |
| High Voltage Limit on CS, SCK, SDI, SDO, SHDN | VHV | 12.5 | V | VDD ≥ 4.5V | 4 | ||
| High Voltage Limit (VMAX) | VMAX | 12.5 | V | Pin can tolerate VMAX or less. | 9 | ||
| Weak Pull-up Current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VCS = 12.5V | 9 | ||
| Input Leakage Current | IIL | -1 | 1 | µA | VIN = VDD and VIN = VSS | 9 | |
| VDD Start Voltage to ensure Wiper Reset | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Supply Current, serial interface active (write) | IDD | 450 | µA | Serial Interface Active, VDD = 5.5V, CS = VIL, SCK @ 5 MHz, write all 0's to volatile Wiper 0 (address 0h) | 4 | ||
| Supply Current, serial interface inactive | IDD | 2.5 | 5 | µA | Serial Interface Inactive, CS = VIH, VDD = 5.5V | 4 | |
| Supply Current, serial interface active (decrement) | IDD | 0.55 | 1 | mA | Serial Interface Active, VDD = 5.5V, CS = VIHH, SCK @ 5 MHz, decrement volatile Wiper 0 (address 0h) | 4 | |
| SCK Input Frequency | FSCK | 10 | MHz | VDD = 2.7V to 5.5V | 11 | ||
| SCK Input Frequency | FSCK | 1 | MHz | VDD = 1.8V to 2.7V | 11 | ||
| CS Active (VIL or VIHH) to SCK↑ input | TcsA2scH | 60 | ns | 11 | |||
| SCK input high time | TscH | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| SCK input high time | TscH | 500 | ns | VDD = 1.8V to 2.7V | 11 | ||
| SCK input low time | TscL | 45 | ns | VDD = 2.7V to 5.5V | 11 | ||
| SCK input low time | TscL | 500 | ns | VDD = 1.8V to 2.7V | 11 | ||
| CS Inactive (VIH) to SDO output hi-impedance | TcsH2DOZ | 50 | ns | Note 1 | 11 | ||
| SDO data output valid after SCK↓ edge | TscL2DOV | 70 | ns | VDD = 2.7V to 5.5V | 11 | ||
| SDO data output valid after SCK↓ edge | TscL2DOV | 170 | ns | VDD = 1.8V to 2.7V | 11 | ||
| CS Inactive (VIH) after SCK↑ edge | TscH2csI | 100 | ns | VDD = 2.7V to 5.5V | 11 | ||
| CS Inactive (VIH) after SCK↑ edge | TscH2csI | 1 | ms | VDD = 1.8V to 2.7V | 11 | ||
| Hold time of CS Inactive (VIH) to CS Active (VIL or VIHH) | TcsA2csI | 50 | ns | 11 | |||
| Potentiometer Bandwidth -3 dB (100 kΩ) | BW | 100 | kHz | 100 kΩ 8-bit Code = 80h (load = 30 pF) | 6 | ||
| Nominal Resistance Tempco | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Nominal Resistance Tempco | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Nominal Resistance Tempco | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric Tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Leakage current into A, W or B | IWL | 100 | nA | MCP4XX1 PxA = PxW = PxB = VSS | 5 | ||
| Voltage on VDD with respect to VSS | -0.6 | 7 | V | 3 | |||
| Voltage on CS, SCK, SDI, SDI/SDO, SHDN with respect to VSS | -0.6 | 12.5 | V | 3 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP ON HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Maximum output current sunk by any Output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any Output pin | 25 | mA | 3 | ||||
| Maximum current out of VSS pin | 100 | mA | 3 | ||||
| Maximum current into VDD pin | 100 | mA | 3 | ||||
| Maximum current into PXA, PXW and PXB pins | -2.5 | 2.5 | mA | 3 | |||
| Storage temperature | TA | -65 | 150 | °C | 3 | ||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 3 | |||
| ESD protection on all pins (HBM) | 4 | kV | HBM | 3 | |||
| ESD protection on all pins (MM) | 300 | V | MM | 3 | |||
| Maximum Junction Temperature (TJ) | TJ | 150 | °C | 3 | |||
| Thermal Resistance, 14L-TSSOP | θJA | 100 | °C/W | 14 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | P = Plastic Dual In-line (PDIP) (300 mil), 8/14-lead SN = Plastic Small Outline (SOIC), (150 mil), 8-lead | 85 |
CAD (KiCad official)
- Symbol:
MCP4251-104E - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mcp4251-104e-etched.step/mcp4251-104e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4251-104e.step/mcp4251-104e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (88 pp, sha256
6c60b083b2ef0a92, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).