component
RT8452GQW
Public Made by Adomby adom
Richtek Tech LED Drivers, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRT8452GQW
Richtek Tech · LED Drivers · WQFN-16-EP(3x3)
RT8452GQW from Richtek Tech, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GBIAS | power_out | Internal gate driver bias output that requires a good bypass capacitor (10V rated, 1µF typical suggested). |
| 2 | GATE | output | External MOSFET switch gate driver output. |
| 3 | PWMOUT | output | Output pin for the PWM dimming FET driver. |
| 4 | ISW | input | External MOSFET switch current sense input; connect the current sense resistor between the external N-MOSFET switch and ground. |
| 5 | PWMDIM | input | Control input pin for the PWM dimming FET driver. |
| 6 | ISP | input | LED current sense amplifier positive input. |
| 7 | ISN | input | LED current sense amplifier negative input; voltage threshold between ISP and ISN is 190mV. |
| 8 | VC | passive | PWM control loop compensation pin. |
| 9 | ACTL | input | Analog dimming control with an effective programming voltage range between 0.2V and 1.2V. |
| 10 | DCTL | input | Digital dimming input; with a 0.47µF filter capacitor on ACTL, the PWM signal on DCTL is averaged into an analog dimming signal on ACTL. |
| 11 | SS | passive | Soft-start pin; a capacitor of at least 10nF is required for proper soft start. |
| 12 | NC | unconnected | No internal connection. |
| 13 | EN | input | Chip enable, active high; the chip is in shutdown mode when this pin voltage is low. |
| 14 | OVP | input | Over voltage protection input; the PWM converter turns off when the pin voltage goes higher than 1.2V. |
| 15 | VCC | power_in | Power supply pin of the chip (6V to 36V recommended); a low ESR bypass capacitor is required. |
| 16 | GND | power_in | Ground pin. |
| 17 | GND | power_in | Exposed pad; must be soldered to a large PCB and connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | WQFN-16-EP(3x3) |
| Category | Display Modules / LED Drivers / Display Drivers |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Current | IVCC | 6 | 7.2 | mA | VC ≤ 0.4V (Switching off) | 6 | |
| EN Threshold Voltage Logic-High | VIH | 2 | V | 6 | |||
| EN Threshold Voltage Logic-Low | VIL | 0.5 | V | 6 | |||
| EN Input Current | VEN | 1.2 | µA | VEN = 3V | 6 | ||
| Current Sense Amplifier Input Threshold (VISP − VISN) | 180 | 190 | 200 | mV | 12V ≤ common mode ≤ 36V | 6 | |
| DCTL Input Current | IDCTL | 0.5 | µA | 0.3V ≤ VDCTL ≤ 6V | 7 | ||
| Switching Frequency | fSW | 280 | 350 | 420 | kHz | 7 | |
| PWMDIM Logic-High Threshold Voltage | VPWMDIM_H | 2 | V | 7 | |||
| PWMDIM Logic-Low Threshold Voltage | VPWMDIM_L | 0.5 | V | 7 | |||
| OVP Input Current | IOVP | 0.1 | µA | 0.7V ≤ VOVP ≤ 1.5V | 7 | ||
| Shutdown Current | ISHDN | 12 | µA | VEN ≤ 0.7V | 6 | ||
| ISP / ISN Input Current | IISP / IISN | 140 | µA | 6V ≤ VISP = VISN ≤ 48V | 6 | ||
| VC Output Current | IVC | 20 | µA | VISP − VISN = 190mV, 0.5V ≤ VC ≤ 2.4V | 6 | ||
| VC Threshold for PWM Switch Off | 0.7 | V | 6 | ||||
| ACTL Pin Input Current | IACTL | 1 | µA | VACTL = 1.2V | 7 | ||
| ACTL Pin Input Current | IACTL | 10 | µA | VACTL = 0.2V | 7 | ||
| LED Current Off Threshold at ACTL | VACTL_Off | 0.3 | V | 7 | |||
| Minimum Off Time | 250 | ns | Note 5 | 7 | |||
| GBIAS Voltage | VGBIAS | 8.5 | V | IGBIAS = 20mA | 7 | ||
| Gate Voltage High | VGate_H | 7.2 | V | IGate = 50mA | 7 | ||
| Gate Voltage High | VGate_H | 7.8 | V | IGate = 100µA | 7 | ||
| Gate Voltage Low | VGate_L | 0.25 | V | IGate = 50mA | 7 | ||
| Gate Voltage Low | VGate_L | 0.1 | V | IGate = 100µA | 7 | ||
| GATE Drive Rise and Fall Time | 15 | ns | 1nF Load at GATE | 7 | |||
| PWM Switch Current Limit Threshold | ISW_LIM | 110 | mV | 7 | |||
| PWMOUT Output Voltage High | VPWMOUT_H | 7.5 | V | IPWMOUT = 1mA | 7 | ||
| PWMOUT Output Voltage Low | VPWMOUT_L | 0.45 | V | IPWMOUT = 100µA | 7 | ||
| PWMOUT Drive Rise and Fall Time | 40 | ns | 1nF Load at PWMOUT | 7 | |||
| OVP Threshold | VOVP_th | 1.18 | V | 7 | |||
| Soft-Start Pin Current | ISS | 6 | µA | VSS ≤ 2V | 7 | ||
| Thermal Shutdown Protection | TSD | 145 | °C | 7 | |||
| Thermal Shutdown Hysteresis | TSD | 10 | °C | 7 | |||
| Supply Input Voltage Range | VCC | 6 | 36 | V | 6 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 6 | ||
| Supply Input Voltage | VCC | 38 | V | 6 | |||
| GBIAS, GATE, PWMDIM, PWMOUT | 10 | V | 6 | ||||
| ISW | 1 | V | 6 | ||||
| ISP, ISN | 54 | V | 6 | ||||
| DCTL, ACTL, OVP Pin Voltage | 8 | V | Note 6: up to 36V with 20kΩ serial resistor on ACTL and DCTL | 6 | |||
| EN Pin Voltage | 20 | V | 6 | ||||
| Power Dissipation WQFN-16L 3x3 | PD | 1.4 | W | TA = 25°C | 6 | ||
| Junction Temperature | TJ | 150 | °C | 6 | |||
| Lead Temperature (Soldering, 10 sec.) | 260 | °C | 6 | ||||
| Storage Temperature Range | -65 | 150 | °C | 6 | |||
| ESD Susceptibility HBM | 2 | kV | 6 | ||||
| ESD Susceptibility MM | 200 | V | 6 | ||||
| Package Thermal Resistance, Junction to Ambient WQFN-16L 3x3 | θJA | 68 | °C/W | Note 2, JEDEC 51-7 four-layer board | 6 | ||
| Package Thermal Resistance, Junction to Case WQFN-16L 3x3 | θJC | 7.5 | °C/W | Note 2, measured at exposed pad | 6 |
CAD (KiCad official)
- Symbol:
RT8452GQW - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
rt8452gqw-etched.step/rt8452gqw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt8452gqw.step/rt8452gqw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (17 pp, sha256
39ac6ef03534ed17, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).