component
F280025PMSR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownF280025PMSR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
F280025PMSR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GPIO29 | bidirectional | General-purpose digital I/O 29, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 2 | GPIO28 | bidirectional | General-purpose digital I/O 28, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 3 | XRSn | input | Device external reset input (active low), used together with the on-chip brown-out reset (BOR) circuit to reset the device. |
| 4 | VDD | power_in | Digital core logic power-supply pin, generated/regulated on-chip by the internal VREG per the single 3.3V supply feature. |
| 5 | VSS | power_in | Digital ground return pin. |
| 6 | A6 | input | Dedicated analog input pin, ADC channel A6 (one of up to 16 external ADC channels). |
| 7 | C6 | input | Dedicated analog input pin, CMPSS window-comparator input C6. |
| 8 | A3,C5,VDAC | bidirectional | Multiplexed analog pin: ADC channel A3 input, CMPSS comparator C5 input, or internal CMPSS DAC reference output (VDAC). |
| 9 | A2,C9 | input | Dedicated analog input pin, multiplexed as ADC channel A2 or CMPSS comparator input C9. |
| 10 | A15,C7 | input | Dedicated analog input pin, multiplexed as ADC channel A15 or CMPSS comparator input C7. |
| 11 | A14,C4 | input | Dedicated analog input pin, multiplexed as ADC channel A14 or CMPSS comparator input C4. |
| 12 | A11,C0 | input | Dedicated analog input pin, multiplexed as ADC channel A11 or CMPSS comparator input C0. |
| 13 | A5,C2 | input | Dedicated analog input pin, multiplexed as ADC channel A5 or CMPSS comparator input C2. |
| 14 | A1 | input | Dedicated analog input pin, ADC channel A1. |
| 15 | A0,C15 | input | Dedicated analog input pin, multiplexed as ADC channel A0 or CMPSS comparator input C15. |
| 16 | VREFHI | passive | High reference terminal for the on-chip 12-bit ADC voltage reference. |
| 17 | VREFLO | passive | Low reference (return) terminal for the on-chip 12-bit ADC voltage reference. |
| 18 | A12,C1 | input | Dedicated analog input pin, multiplexed as ADC channel A12 or CMPSS comparator input C1. |
| 19 | A7,C3 | input | Dedicated analog input pin, multiplexed as ADC channel A7 or CMPSS comparator input C3. |
| 20 | A8,C11 | input | Dedicated analog input pin, multiplexed as ADC channel A8 or CMPSS comparator input C11. |
| 21 | VSSA | power_in | Analog ground return pin for the ADC and analog peripherals. |
| 22 | VDDA | power_in | Analog power-supply pin for the ADC and analog peripherals. |
| 23 | A4,C14 | input | Dedicated analog input pin, multiplexed as ADC channel A4 or CMPSS comparator input C14. |
| 24 | A9,C8 | input | Dedicated analog input pin, multiplexed as ADC channel A9 or CMPSS comparator input C8. |
| 25 | A10,C10 | input | Dedicated analog input pin, multiplexed as ADC channel A10 or CMPSS comparator input C10. |
| 26 | VSS | power_in | Digital ground return pin. |
| 27 | VDD | power_in | Digital core logic power-supply pin, generated/regulated on-chip by the internal VREG. |
| 28 | VDDIO | power_in | Digital I/O power-supply pin, the single 3.3V external supply rail for the device I/O buffers. |
| 29 | GPIO13 | bidirectional | General-purpose digital I/O 13, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 30 | GPIO12 | bidirectional | General-purpose digital I/O 12, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 31 | GPIO11 | bidirectional | General-purpose digital I/O 11, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 32 | GPIO33 | bidirectional | General-purpose digital I/O 33, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 33 | GPIO16 | bidirectional | General-purpose digital I/O 16, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 34 | GPIO17 | bidirectional | General-purpose digital I/O 17, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 35 | GPIO24 | bidirectional | General-purpose digital I/O 24, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 36 | TCK | input | JTAG test clock input for the IEEE 1149.1 debug/emulation interface. |
| 37 | GPIO37/TDO | bidirectional | General-purpose digital I/O 37, multiplexed with the JTAG TDO (test data output) function of the debug/emulation interface. |
| 38 | TMS | input | JTAG test mode select input for the IEEE 1149.1 debug/emulation interface. |
| 39 | GPIO35/TDI | bidirectional | General-purpose digital I/O 35, multiplexed with the JTAG TDI (test data input) function of the debug/emulation interface. |
| 40 | GPIO32 | bidirectional | General-purpose digital I/O 32, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 41 | GPIO18_X2 | bidirectional | General-purpose digital I/O 18, multiplexed with X2 crystal-oscillator output for an external crystal/resonator. |
| 42 | GPIO19_X1 | bidirectional | General-purpose digital I/O 19, multiplexed with X1 crystal-oscillator input for an external crystal/resonator or clock input. |
| 43 | VDDIO | power_in | Digital I/O power-supply pin, the single 3.3V external supply rail for the device I/O buffers. |
| 44 | VDD | power_in | Digital core logic power-supply pin, generated/regulated on-chip by the internal VREG. |
| 45 | VSS | power_in | Digital ground return pin. |
| 46 | GPIO39 | bidirectional | General-purpose digital I/O 39, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 47 | GPIO8 | bidirectional | General-purpose digital I/O 8, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 48 | GPIO4 | bidirectional | General-purpose digital I/O 4, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 49 | GPIO3 | bidirectional | General-purpose digital I/O 3, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 50 | GPIO2 | bidirectional | General-purpose digital I/O 2, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 51 | GPIO1 | bidirectional | General-purpose digital I/O 1, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 52 | GPIO0 | bidirectional | General-purpose digital I/O 0, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 53 | GPIO40 | bidirectional | General-purpose digital I/O 40, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 54 | GPIO23 | bidirectional | General-purpose digital I/O 23, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 55 | GPIO41 | bidirectional | General-purpose digital I/O 41, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 56 | GPIO22 | bidirectional | General-purpose digital I/O 22, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 57 | GPIO7 | bidirectional | General-purpose digital I/O 7, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 58 | VSS | power_in | Digital ground return pin. |
| 59 | VDD | power_in | Digital core logic power-supply pin, generated/regulated on-chip by the internal VREG. |
| 60 | VDDIO | power_in | Digital I/O power-supply pin, the single 3.3V external supply rail for the device I/O buffers. |
| 61 | GPIO5 | bidirectional | General-purpose digital I/O 5, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 62 | GPIO9 | bidirectional | General-purpose digital I/O 9, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 63 | GPIO10 | bidirectional | General-purpose digital I/O 10, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
| 64 | GPIO6 | bidirectional | General-purpose digital I/O 6, individually programmable and multiplexed with other peripheral functions per Table 5-1. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
F280025PMSR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
f280025pmsr-etched.step/f280025pmsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);f280025pmsr.step/f280025pmsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (245 pp, sha256
0723d8e3e09e1f8b, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-5(text+vision), consensusclaude-opus-4-8(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).