component
CD74HC4049NSR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, SO-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownCD74HC4049NSR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SO-16
CD74HC4049NSR from Texas Instruments, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive supply, 2V to 6V operating for HC types (absolute max -0.5V to 7V); also sets the output logic level for level translation. |
| 2 | 1Y | output | Inverting buffer output 1 (Y = NOT 1A), output voltage 0V to VCC, ±25mA max DC output current, standard 10 LSTTL fanout. |
| 3 | 1A | input | Input to inverter 1 with modified input protection allowing high-to-low level translation; operating range 0V to 15V (absolute max 16V), independent of VCC. |
| 4 | 2Y | output | Inverting buffer output 2 (Y = NOT 2A), output voltage 0V to VCC, ±25mA max DC output current. |
| 5 | 2A | input | Input to inverter 2, level-translating input with an operating range of 0V to 15V (absolute max 16V). |
| 6 | 3Y | output | Inverting buffer output 3 (Y = NOT 3A), output voltage 0V to VCC, ±25mA max DC output current. |
| 7 | 3A | input | Input to inverter 3, level-translating input with an operating range of 0V to 15V (absolute max 16V). |
| 8 | GND | power_in | Ground reference; ±50mA max DC ground current. |
| 9 | 4A | input | Input to inverter 4, level-translating input with an operating range of 0V to 15V (absolute max 16V). |
| 10 | 4Y | output | Inverting buffer output 4 (Y = NOT 4A), output voltage 0V to VCC, ±25mA max DC output current. |
| 11 | 5A | input | Input to inverter 5, level-translating input with an operating range of 0V to 15V (absolute max 16V). |
| 12 | 5Y | output | Inverting buffer output 5 (Y = NOT 5A), output voltage 0V to VCC, ±25mA max DC output current. |
| 13 | NC | unconnected | No internal connection. |
| 14 | 6A | input | Input to inverter 6, level-translating input with an operating range of 0V to 15V (absolute max 16V). |
| 15 | 6Y | output | Inverting buffer output 6 (Y = NOT 6A), output voltage 0V to VCC, ±25mA max DC output current. |
| 16 | NC | unconnected | No internal connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| Input Voltage Range | VI | -0.5 | 16 | V | 3 | ||
| DC Input Diode Current | IIK | -20 | mA | For VI < -0.5V | 3 | ||
| DC Output Diode Current | IOK | -20 | 20 | mA | For VO < -0.5V or VO > VCC + 0.5V | 3 | |
| DC Output Source or Sink Current per Output Pin | IO | -25 | 25 | mA | For VO > -0.5V or VO < VCC + 0.5V | 3 | |
| DC VCC or Ground Current | ICC, IGND | -50 | 50 | mA | 3 | ||
| Maximum Junction Temperature (Plastic Package) | TJ | 150 | °C | Plastic package | 3 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 3 | ||
| Maximum Lead Temperature | 300 | °C | Soldering 10s | 3 | |||
| Operating Temperature Range | TA | -55 | 125 | °C | 3 | ||
| Supply Voltage Range | VCC | 2 | 6 | V | HC Types | 3 | |
| DC Input Voltage | VI | 0 | 15 | V | 3 | ||
| DC Output Voltage | VO | 0 | 6 | V | 0V to VCC | 3 | |
| Input Rise and Fall Time | tr, tf | 1000 | ns | VCC = 2V | 3 | ||
| Input Rise and Fall Time | tr, tf | 500 | ns | VCC = 4.5V | 3 | ||
| Input Rise and Fall Time | tr, tf | 400 | ns | VCC = 6V | 3 | ||
| Package Thermal Impedance | θJA | 64 | °C/W | NS (SOP) package, JESD 51-7 | 3 | ||
| High Level Input Voltage | VIH | 1.5 | V | VCC = 2V, 25°C | 3 | ||
| High Level Input Voltage | VIH | 3.15 | V | VCC = 4.5V, 25°C | 3 | ||
| High Level Input Voltage | VIH | 4.2 | V | VCC = 6V, 25°C | 3 | ||
| Low Level Input Voltage | VIL | 0.5 | V | VCC = 2V, 25°C | 3 | ||
| Low Level Input Voltage | VIL | 1.35 | V | VCC = 4.5V, 25°C | 3 | ||
| Low Level Input Voltage | VIL | 1.8 | V | VCC = 6V, 25°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 1.9 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 2V, 25°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 4.4 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 4.5V, 25°C | 3 | ||
| High Level Output Voltage CMOS Loads | VOH | 5.9 | V | VI = VIH or VIL, IO = -0.02mA, VCC = 6V, 25°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 3.98 | V | IO = -4mA, VCC = 4.5V, 25°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 3.7 | V | IO = -4mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 5.48 | V | IO = -5.2mA, VCC = 6V, 25°C | 3 | ||
| High Level Output Voltage TTL Loads | VOH | 5.2 | V | IO = -5.2mA, VCC = 6V, -55°C to 125°C | 3 | ||
| Low Level Output Voltage CMOS Loads | VOL | 0.1 | V | VI = VIH or VIL, IO = 0.02mA, VCC = 2V, 4.5V, 6V, 25°C | 3 | ||
| Low Level Output Voltage TTL Loads | VOL | 0.26 | V | IO = 4mA, VCC = 4.5V, 25°C | 3 | ||
| Low Level Output Voltage TTL Loads | VOL | 0.4 | V | IO = 4mA, VCC = 4.5V, -55°C to 125°C | 3 | ||
| Input Leakage Current | II | -0.1 | 0.1 | µA | VI = VCC or GND, VCC = 6V, 25°C | 3 | |
| Input Leakage Current | II | -5 | 5 | µA | VI = 15V, VCC = 6V, -55°C to 125°C | 3 | |
| Input Leakage Current | II | -0.5 | 0.5 | µA | VI = 15V, VCC = 6V, 25°C | 3 | |
| Quiescent Device Current | ICC | 2 | µA | VI = VCC or GND, IO = 0, VCC = 6V, 25°C | 4 | ||
| Quiescent Device Current | ICC | 40 | µA | VI = VCC or GND, IO = 0, VCC = 6V, -55°C to 125°C | 4 | ||
| Propagation Delay nA to nY | tPLH, tPHL | 85 | ns | CL = 50pF, VCC = 2V, 25°C | 4 | ||
| Propagation Delay nA to nY | tPLH, tPHL | 17 | ns | CL = 50pF, VCC = 4.5V, 25°C | 4 | ||
| Propagation Delay nA to nY | tPLH, tPHL | 14 | ns | CL = 50pF, VCC = 6V, 25°C | 4 | ||
| Propagation Delay nA to nY | tPLH, tPHL | 130 | ns | CL = 50pF, VCC = 2V, -55°C to 125°C | 4 | ||
| Transition Times | tTLH, tTHL | 75 | ns | CL = 50pF, VCC = 2V, 25°C | 4 | ||
| Transition Times | tTLH, tTHL | 15 | ns | CL = 50pF, VCC = 4.5V, 25°C | 4 | ||
| Transition Times | tTLH, tTHL | 13 | ns | CL = 50pF, VCC = 6V, 25°C | 4 | ||
| Input Capacitance | CI | 10 | pF | 4 | |||
| Propagation Delay | tPLH, tPHL | 6 | ns | CL = 15pF, VCC = 5V, 25°C | 4 | ||
| Power Dissipation Capacitance | CPD | 35 | pF | VCC = 5V | 4 |
CAD (KiCad official)
- Symbol:
CD74HC4049NSR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
cd74hc4049nsr-etched.step/cd74hc4049nsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hc4049nsr.step/cd74hc4049nsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (11 pp, sha256
2d5643ffe4911f23, retrieved 2026-10-22, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).