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Contents

README

markdown

FQA40N25

onsemi · MOSFETs · TO-3P

FQA40N25 from onsemi, in a TO-3P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the channel, with VGS rated ±30 V max and threshold of 3.0 V to 5.0 V.
2 D passive Drain; 250 V max drain-source voltage and 40 A continuous drain current at TC = 25°C.
3 S passive Source; connected to the body diode anode, with 40 A max continuous diode forward current.

Key specifications

Parameter Value
Manufacturer onsemi
Package TO-3P
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: FQA40N25
  • Footprint: Package_TO_SOT_THT:TO-3P-3_Vertical
  • 3D model: TO-3P (KiCad packages3D, STEP)
  • 3D model files: fqa40n25-etched.step / fqa40n25-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); fqa40n25.step / fqa40n25.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 6960bcf604866155, retrieved 2026-11-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF