CAT24C08TDI-GT3 from onsemi, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SCL	input	The Serial Clock input accepts the clock generated by the master and supports Standard (100 kHz) and Fast (400 kHz) I2C operation.
2	VSS	power_in	Ground reference for the device, to be connected to the system ground.
3	SDA	bidirectional	The Serial Data I/O receives input data and transmits stored data, and is open drain in transmit mode, with data sampled on the SCL rising edge.
4	WP	input	The Write Protect input inhibits all write operations when held HIGH and is pulled LOW internally when not driven.
5	VCC	power_in	Power supply input, specified from 1.7 V to 5.5 V.

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	TSOT-23-5
Category	Memory
Pins	5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Max	Unit	Conditions	Page
Storage Temperature		-65	150	°C		3
Voltage on any pin with respect to Ground		-0.5	6.5	V	With respect to Ground (Note 1)	3
Voltage undershoot on any pin		-1		V	Input transitions, for more than 20 ns (Note 1)	3
Voltage overshoot on A0, A1, A2, WP			1	V above VCC	Input transitions, for more than 20 ns (Note 1)	3
Read Current	ICCR		1	mA	Read, fSCL = 400 kHz	3
Write Current	ICCW		2	mA	Write, fSCL = 400 kHz	3
Standby Current	ISB		1	µA	TA = −40°C to +85°C, VCC ≤ 3.3 V	3
Standby Current	ISB		3	µA	TA = −40°C to +85°C, VCC > 3.3 V	3
I/O Pin Leakage	IL		2	µA	Pin at GND or VCC	3
Input Low Voltage	VIL	-0.5		V		3
Input Low Voltage	VIL		0.3	x VCC		3
Input High Voltage, A0, A1, A2, WP	VIH	0.7		x VCC		3
Input High Voltage, A0, A1, A2, WP (VCC + offset)	VIH		0.5	V above VCC	Max = VCC + 0.5 V as printed	3
Input High Voltage, SCL and SDA	VIH	0.7		x VCC		3
Input High Voltage, SCL and SDA	VIH		5.5	V		3
Output Low Voltage	VOL		0.4	V	VCC > 2.5 V, IOL = 3 mA	3
Output Low Voltage	VOL		0.2	V	VCC < 2.5 V, IOL = 1 mA	3
SDA Pin Capacitance	CIN		8	pF	VIN = 0 V, f = 1.0 MHz, VCC = 5.0 V	4
Other Pins Capacitance	CIN		6	pF		4
WP Input Current	IWP		130	µA	VIN < VIH, VCC = 5.5 V	4
WP Input Current	IWP		120	µA	VIN < VIH, VCC = 3.3 V	4
WP Input Current	IWP		80	µA	VIN < VIH, VCC = 1.7 V	4
WP Input Current	IWP		2	µA	VIN > VIH	4
Address Input Current (A0, A1, A2), Product Rev K	IA		50	µA	VIN < VIH, VCC = 5.5 V	4
Address Input Current (A0, A1, A2), Product Rev K	IA		35	µA	VIN < VIH, VCC = 3.3 V	4
Address Input Current (A0, A1, A2), Product Rev K	IA		25	µA	VIN < VIH, VCC = 1.7 V	4
Address Input Current (A0, A1, A2), Product Rev K	IA		2	µA	VIN > VIH	4
Clock Frequency	FSCL		100	kHz	Standard mode	4
Clock Frequency	FSCL		400	kHz	Fast mode	4
START Condition Hold Time	tHD:STA	4		µs	Standard mode	4
START Condition Hold Time	tHD:STA	0.6		µs	Fast mode	4
Low Period of SCL Clock	tLOW	4.7		µs	Standard mode	4
Low Period of SCL Clock	tLOW	1.3		µs	Fast mode	4
High Period of SCL Clock	tHIGH	4		µs	Standard mode	4
High Period of SCL Clock	tHIGH	0.6		µs	Fast mode	4
START Condition Setup Time	tSU:STA	4.7		µs	Standard mode	4
START Condition Setup Time	tSU:STA	0.6		µs	Fast mode	4
Data In Hold Time	tHD:DAT	0		µs	Standard mode	4
Data In Setup Time	tSU:DAT	250		ns	Standard mode	4
Data In Setup Time	tSU:DAT	100		ns	Fast mode	4
SDA and SCL Rise Time	tR		1000	ns	Standard mode	4
SDA and SCL Rise Time	tR		300	ns	Fast mode	4
SDA and SCL Fall Time (Note 6)	tF		300	ns	Standard mode	4
STOP Condition Setup Time	tSU:STO	4		µs	Standard mode	4
STOP Condition Setup Time	tSU:STO	0.6		µs	Fast mode	4
Bus Free Time Between STOP and START	tBUF	4.7		µs	Standard mode	4
Bus Free Time Between STOP and START	tBUF	1.3		µs	Fast mode	4
SCL Low to Data Out Valid	tAA		3.5	µs	Standard mode	4
SCL Low to Data Out Valid	tAA		0.9	µs	Fast mode	4
Data Out Hold Time	tDH	100		ns	Standard mode	4
Noise Pulse Filtered at SCL and SDA Inputs	Ti		100	ns		4
WP Setup Time	tSU:WP	0		µs		4
WP Hold Time	tHD:WP	2.5		µs		4
Write Cycle Time	tWR		5	ms		4
Power-up to Ready Mode	tPU		1	ms	Notes 7, 8	4
Supply Voltage	VCC	1.7	5.5	V	Industrial range, TA = −40°C to +85°C	3
Operating Temperature (Industrial)	TA	-40	85	°C	Industrial range (Note 9)	3

CAD (KiCad official)

Symbol: CAT24C08TDI-GT3
Footprint: Package_TO_SOT_SMD:TSOT-23-5
3D model: TSOT-23-5 (KiCad packages3D, STEP)
3D model files: cat24c08tdi-gt3-etched.step / cat24c08tdi-gt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat24c08tdi-gt3.step / cat24c08tdi-gt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (17 pp, sha256 ee973dbc065d4e9c, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

CAT24C08TDI-GT3

Verified CAT24C08TDI-GT3

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README