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Contents

README

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SY8892EARC

Silergy Corp · DC-DC Converters · SOT-563

SY8892EARC from Silergy Corp, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB input Output feedback pin: connect to the center point of the output resistor divider to set VOUT = 0.6 × (1 + RH/RL), with the reference voltage VREF of 0.6 V.
2 GND power_in Ground pin.
3 VIN power_in Input pin, which must be decoupled to GND with at least a 10 µF ceramic capacitor; the input range is 2.5 V to 5.5 V.
4 LX output Inductor pin: connect to the switching node of the inductor.
5 EN input Enable control: pull high to turn the regulator on (VEN,H minimum 1.2 V, VEN,L maximum 0.4 V); do not leave it floating.
6 PG output Power good indicator, open-drain output: low if the output is below 90% or above 120% of the regulation voltage, high otherwise; connect a pull-up resistor to the input.

Key specifications

Parameter Value
Manufacturer Silergy Corp
Package SOT-563
Category Power Management (PMIC)
Pins 6

CAD (KiCad official)

  • Symbol: SY8892EARC
  • Footprint: Package_TO_SOT_SMD:SOT-563
  • 3D model: SOT-563 (KiCad packages3D, STEP)
  • 3D model files: sy8892earc-etched.step / sy8892earc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sy8892earc.step / sy8892earc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Silergy Corp datasheet (10 pp, sha256 69c09f67cc7c869d, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF