component
SCT2A27STER
Public Made by Adomby adom
SCT DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSCT2A27STER
SCT · DC-DC Converters · ESOP-8
SCT2A27STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Inverting input of the comparator; the external feedback divider from VOUT to GND sets the output voltage, and the device regulates FB to the 1.2V typical internal reference (1.188V to 1.212V). |
| 2 | EN | input | Enable pin with an internal pull-up current source; pull it below 1.23V to disable the converter, and float it to enable the converter. |
| 3 | VIN | power_in | Input supply voltage, specified from 5.5V to 100V; connect a local bypass capacitor from VIN to GND with the path kept as short as possible. |
| 4 | BST | power_out | Bootstrap supply for the high-side power MOSFET gate driver; connect a 0.1uF capacitor from BST to SW, which is charged while the low-side MOSFET is on or SW is low. |
| 5 | SW | output | Regulator switching output; connect to the external power inductor, with the catch diode from SW to GND. |
| 6 | VBIAS | power_in | Supply input for the LDO with internal VBIAS UVLO (rising 3V, falling 2.7V); connect to VOUT for low-power operation, and quiescent current drops when VBIAS is above 6V. |
| 7 | LDO | power_out | Output of the integrated 200mA LDO, which requires at least a 1uF ceramic capacitor. |
| 8 | EN_LDO | input | LDO enable and output-voltage select: below 0.8V disables the LDO, 1.2V to 1.8V sets 3.3V, and above 2.2V or floating sets 5V. |
| 9 | GND | power_in | Ground; must be connected to the PCB ground plane for proper operation and thermal performance (this is the exposed thermal pad of the ESOP-8 package). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VIN | 5.5 | 100 | V | 4 | ||
| VIN UVLO threshold | VUVLO | 4.7 | 5 | 5.3 | V | VIN rising | 4 |
| Shutdown current from VIN pin | ISHDN | 4.2 | 10 | μA | EN=0, EN_LDO=0, no load | 4 | |
| Quiescent current from VIN pin | IQ | 122 | 200 | μA | EN floating, EN_LDO=0, no load, non-switching, BOOT-SW=5V | 4 | |
| High-side MOSFET on-resistance | RDSON_H | 500 | 950 | mΩ | VBOOT-VSW=5V | 4 | |
| Reference voltage of FB | VREF | 1.188 | 1.2 | 1.212 | V | 4 | |
| LDO output voltage | VLDO | 3.168 | 3.3 | 3.432 | V | 1.2V< EN_LDO <1.8V | 4 |
| LDO output voltage | VLDO | 4.8 | 5 | 5.2 | V | 2.2V< EN_LDO or EN_LDO floating | 4 |
| Switching frequency | FSW | 260 | 300 | 340 | kHz | 4 | |
| Minimum off-time | TOFF_MIN | 200 | 260 | ns | 4 | ||
| HS MOSFET current limit | ILIM | 3.5 | 4 | 4.5 | A | TJ=25°C | 4 |
| HS MOSFET current limit | ILIM | 3.3 | 4 | 4.7 | A | TJ=-40°C~125°C | 4 |
| Operating input voltage (recommended) | VIN | 5.5 | 100 | V | 3 | ||
| Output voltage range (recommended) | VOUT | 1.2 | 30 | V | 3 | ||
| Operating junction temperature (recommended) | TJ | -40 | 150 | °C | 3 | ||
| BST pin voltage (absolute maximum) | VBST | -0.3 | 116 | V | 2 | ||
| VIN pin voltage (absolute maximum) | VIN | -0.3 | 110 | V | 2 | ||
| SW pin voltage (absolute maximum) | VSW | -1 | 110 | V | 2 | ||
| BST-SW voltage (absolute maximum) | VBST-SW | -0.3 | 6 | V | 2 | ||
| VBIAS pin voltage (absolute maximum) | VBIAS | -0.3 | 33 | V | 2 | ||
| EN, FB, LDO, EN_LDO pin voltage (absolute maximum) | EN, FB, LDO, EN_LDO | -0.3 | 6 | V | 2 | ||
| Operating junction temperature (absolute maximum) | TJ | -40 | 150 | °C | 2 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 2 | ||
| Junction to ambient thermal resistance | RθJA | 42 | °C/W | ESOP-8L, junction to ambient | 3 | ||
| Junction to case thermal resistance | RθJC | 45.8 | °C/W | ESOP-8L, junction to case | 3 |
CAD (KiCad official)
- Symbol:
SCT2A27STER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
sct2a27ster-etched.step/sct2a27ster-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sct2a27ster.step/sct2a27ster.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SCT datasheet (20 pp, sha256
3befa6af618d6037, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).