component
STM32L496RGT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32L496RGT6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32L496RGT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply (1.55 V to 3.6 V) that powers the RTC and the 32x32-bit backup registers, with the datasheet quoting 320 nA consumption in VBAT mode. |
| 2 | PC13 | bidirectional | 5 V-tolerant GPIO (FT) supplied through the power switch, which sinks only 3 mA, so output speed is limited to 2 MHz with a 30 pF maximum load and it must not be used as a current source; alternate functions include RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V-tolerant GPIO (FT) supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF output and no current-source limits as PC13, and also serves as the 32 kHz LSE oscillator input OSC32_IN. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant GPIO (FT) supplied through the power switch with the same 3 mA sink, 2 MHz / 30 pF output and no current-source limits as PC13, and also serves as the 32 kHz LSE oscillator output OSC32_OUT. |
| 5 | PH0-OSC_IN | bidirectional | 5 V-tolerant GPIO (FT) that also serves as the high-speed external oscillator input OSC_IN for a 4 to 48 MHz crystal. |
| 6 | PH1-OSC_OUT | bidirectional | 5 V-tolerant GPIO (FT) that also serves as the high-speed external oscillator output OSC_OUT for a 4 to 48 MHz crystal. |
| 7 | NRST | bidirectional | Bidirectional reset pin (RST structure) with an embedded weak pull-up resistor. |
| 8 | PC0 | bidirectional | 5 V-tolerant GPIO (FT_fla) with Fm+, LCD and analog capability; alternate functions include LPTIM1_IN1, I2C4_SCL, I2C3_SCL, LPUART1_RX, LCD_SEG18 and LPTIM2_IN1, and it is also ADC123_IN1. |
| 9 | PC1 | bidirectional | 5 V-tolerant GPIO (FT_fla) with Fm+, LCD and analog capability; alternate functions include TRACED0, LPTIM1_OUT, I2C4_SDA, SPI2_MOSI, LPUART1_TX, QUADSPI_BK2_IO0 and SAI1_SD_A, and it is also ADC123_IN2. |
| 10 | PC2 | bidirectional | GPIO (FT_la, 5 V-tolerant when not used as analog input) with LCD and analog capability; alternate functions include LPTIM1_IN2, SPI2_MISO, DFSDM1_CKOUT, QUADSPI_BK2_IO1 and LCD_SEG20, and it is also ADC123_IN3. |
| 11 | PC3 | bidirectional | GPIO (FT_la, 5 V-tolerant when not used as analog input) with LCD and analog capability; alternate functions include LPTIM1_ETR, SPI2_MOSI, QUADSPI_BK2_IO2, LCD_VLCD, SAI1_SD_A and LPTIM2_ETR, and it is also ADC123_IN4. |
| 12 | VSSA/VREF- | power_in | Analog ground and negative ADC reference; VREF- equals VSSA, and on this package the VREF- function is shared with VSSA. |
| 13 | VDDA/VREF+ | power_in | Analog supply (1.62 V to 3.6 V when ADC or COMP is used, 1.8 V for DAC or OPAMP, 2.4 V for VREFBUF) that is shared with the positive ADC reference VREF+, which must not exceed VDDA by more than 0.4 V. |
| 14 | PA0 | bidirectional | 5 V-tolerant GPIO (FT_a) with analog-switch function; alternate functions include TIM2_CH1, TIM8_ETR, USART2_CTS, UART4_TX and RTC_TAMP2/WKUP1, and it is also OPAMP1_VINP, ADC12_IN5. |
| 15 | PA1 | bidirectional | GPIO (FT_la, 5 V-tolerant when not used as analog input) with LCD and analog capability; alternate functions include TIM2_CH2, I2C1_SMBA, SPI1_SCK, USART2_RTS_DE, UART4_RX and LCD_SEG0, and it is also OPAMP1_VINM, ADC12_IN6. |
| 16 | PA2 | bidirectional | GPIO (FT_la, 5 V-tolerant when not used as analog input) with LCD and analog capability; alternate functions include TIM2_CH3, USART2_TX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG1 and SAI2_EXTCLK, and it is also ADC12_IN7 and WKUP4/LSCO. |
| 17 | PA3 | bidirectional | 3.6 V-tolerant GPIO (TT_la) with LCD and analog capability; alternate functions include TIM2_CH4, USART2_RX, LPUART1_RX, QUADSPI_CLK, LCD_SEG2 and SAI1_MCLK_A, and it is also OPAMP1_VOUT and ADC12_IN8. |
| 18 | VSS | power_in | Ground pin, which must be connected to the ground supply, with variations between all ground pins limited to 50 mV. |
| 19 | VDD | power_in | Standard operating supply voltage of 1.71 V to 3.6 V for the digital core and I/O. |
| 20 | PA4 | bidirectional | 3.6 V-tolerant GPIO (TT_a) with analog-switch function; alternate functions include SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, SAI1_FS_B and LPTIM2_OUT, and it is also ADC12_IN9 and DAC1_OUT1. |
| 21 | PA5 | bidirectional | 3.6 V-tolerant GPIO (TT_a) with analog-switch function; alternate functions include TIM2_CH1, TIM2_ETR, TIM8_CH1N, SPI1_SCK and LPTIM2_ETR, and it is also ADC12_IN10 and DAC1_OUT2; its injection current is limited to -5/0 mA. |
| 22 | PA6 | bidirectional | 5 V-tolerant GPIO (FT_la) with LCD and analog capability; alternate functions include TIM1_BKIN, TIM3_CH1, DCMI_PIXCLK, SPI1_MISO, USART3_CTS, LPUART1_CTS, QUADSPI_BK1_IO3, LCD_SEG3 and TIM16_CH1, and it is also OPAMP2_VINP and ADC12_IN11. |
| 23 | PA7 | bidirectional | 5 V-tolerant GPIO (FT_fla) with Fm+, LCD and analog capability; alternate functions include TIM1_CH1N, TIM3_CH2, I2C3_SCL, SPI1_MOSI, QUADSPI_BK1_IO2, LCD_SEG4 and TIM17_CH1, and it is also OPAMP2_VINM and ADC12_IN12. |
| 24 | PC4 | bidirectional | 5 V-tolerant GPIO (FT_la) with LCD and analog capability; alternate functions include USART3_TX, QUADSPI_BK2_IO3 and LCD_SEG22, and it is also COMP1_INM and ADC12_IN13. |
| 25 | PC5 | bidirectional | 5 V-tolerant GPIO (FT_la) with LCD and analog capability; alternate functions include USART3_RX and LCD_SEG23, and it is also COMP1_INP, ADC12_IN14 and WKUP5. |
| 26 | PB0 | bidirectional | 3.6 V-tolerant GPIO (TT_la) with LCD and analog capability; alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI1_NSS, USART3_CK, QUADSPI_BK1_IO1, LCD_SEG5, COMP1_OUT and SAI1_EXTCLK, and it is also OPAMP2_VOUT and ADC12_IN15. |
| 27 | PB1 | bidirectional | 5 V-tolerant GPIO (FT_la) with LCD and analog capability; alternate functions include TIM1_CH3N, TIM3_CH4, DFSDM1_DATIN0, USART3_RTS_DE, LPUART1_RTS_DE, QUADSPI_BK1_IO0, LCD_SEG6 and LPTIM2_IN1, and it is also COMP1_INM and ADC12_IN16. |
| 28 | PB2 | bidirectional | 5 V-tolerant GPIO (FT_la) with LCD and analog capability; alternate functions include RTC_OUT, LPTIM1_OUT, I2C3_SMBA, DFSDM1_CKIN0 and LCD_VLCD, and it is also COMP1_INP. |
| 29 | PB10 | bidirectional | 5 V-tolerant GPIO (FT_fl) with Fm+ and LCD capability; alternate functions include TIM2_CH3, I2C4_SCL, I2C2_SCL, SPI2_SCK, USART3_TX, LPUART1_RX, TSC_SYNC, QUADSPI_CLK, LCD_SEG10 and SAI1_SCK_A. |
| 30 | PB11 | bidirectional | 5 V-tolerant GPIO (FT_fl) with Fm+ and LCD capability; alternate functions include TIM2_CH4, I2C4_SDA, I2C2_SDA, USART3_RX, LPUART1_TX, QUADSPI_BK1_NCS, LCD_SEG11 and COMP2_OUT. |
| 31 | VSS | power_in | Ground pin, which must be connected to the ground supply, with variations between all ground pins limited to 50 mV. |
| 32 | VDD | power_in | Standard operating supply voltage of 1.71 V to 3.6 V for the digital core and I/O. |
| 33 | PB12 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS, DFSDM1_DATIN1, USART3_CK, LPUART1_RTS_DE, TSC_G1_IO1, CAN2_RX, LCD_SEG12, SWPMI1_IO, SAI2_FS_A and TIM15_BKIN. |
| 34 | PB13 | bidirectional | 5 V-tolerant GPIO (FT_fl) with Fm+ and LCD capability; alternate functions include TIM1_CH1N, I2C2_SCL, SPI2_SCK, USART3_CTS, LPUART1_CTS, TSC_G1_IO2, CAN2_TX, LCD_SEG13, SWPMI1_TX, SAI2_SCK_A and TIM15_CH1N. |
| 35 | PB14 | bidirectional | 5 V-tolerant GPIO (FT_fl) with Fm+ and LCD capability; alternate functions include TIM1_CH2N, TIM8_CH2N, I2C2_SDA, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS_DE, TSC_G1_IO3, LCD_SEG14, SWPMI1_RX, SAI2_MCLK_A and TIM15_CH1. |
| 36 | PB15 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, DFSDM1_CKIN2, TSC_G1_IO4, LCD_SEG15, SWPMI1_SUSPEND, SAI2_SD_A and TIM15_CH2. |
| 37 | PC6 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, TSC_G4_IO1, DCMI_D0, LCD_SEG24, SDMMC1_D6 and SAI2_MCLK_A. |
| 38 | PC7 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, TSC_G4_IO2, DCMI_D1, LCD_SEG25, SDMMC1_D7 and SAI2_MCLK_B. |
| 39 | PC8 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include TIM3_CH3, TIM8_CH3, TSC_G4_IO3, DCMI_D2, LCD_SEG26 and SDMMC1_D0. |
| 40 | PC9 | bidirectional | 5 V-tolerant GPIO (FT_fl) with Fm+ and LCD capability; alternate functions include TIM8_BKIN2, TIM3_CH4, TIM8_CH4, DCMI_D3, I2C3_SDA, TSC_G4_IO4, OTG_FS_NOE, LCD_SEG27, SDMMC1_D1 and SAI2_EXTCLK. |
| 41 | PA8 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include MCO, TIM1_CH1, USART1_CK, OTG_FS_SOF, LCD_COM0, SWPMI1_IO, SAI1_SCK_A and LPTIM2_OUT. |
| 42 | PA9 | bidirectional | 5 V-tolerant GPIO (FT_lu) with LCD and USB capability (USB function supplied by VDDUSB); alternate functions include TIM1_CH2, SPI2_SCK, DCMI_D0, USART1_TX, LCD_COM1, SAI1_FS_A and TIM15_BKIN, and it is also OTG_FS_VBUS. |
| 43 | PA10 | bidirectional | 5 V-tolerant GPIO (FT_lu) with LCD and USB capability (USB function supplied by VDDUSB); alternate functions include TIM1_CH3, DCMI_D1, USART1_RX, OTG_FS_ID, LCD_COM2, SAI1_SD_A and TIM17_BKIN. |
| 44 | PA11 | bidirectional | 5 V-tolerant GPIO (FT_u) with USB function supplied by VDDUSB; alternate functions include TIM1_CH4, TIM1_BKIN2, SPI1_MISO, USART1_CTS, CAN1_RX, OTG_FS_DM and TIM1_BKIN2_COMP1. |
| 45 | PA12 | bidirectional | 5 V-tolerant GPIO (FT_u) with USB function supplied by VDDUSB; alternate functions include TIM1_ETR, SPI1_MOSI, USART1_RTS_DE, CAN1_TX and OTG_FS_DP. |
| 46 | PA13 | bidirectional | 5 V-tolerant GPIO (FT) that after reset is the JTMS/SWDIO debug function with an internal pull-up enabled; alternate functions include IR_OUT, OTG_FS_NOE, SWPMI1_TX and SAI1_SD_B. |
| 47 | VSS | power_in | Ground pin, which must be connected to the ground supply, with variations between all ground pins limited to 50 mV. |
| 48 | VDDUSB | power_in | USB supply that must be 3.0 V to 3.6 V when USB is used, and may be 0 to 3.6 V when USB is not used. |
| 49 | PA14 | bidirectional | 5 V-tolerant GPIO (FT) that after reset is the JTCK/SWCLK debug function with an internal pull-down enabled; alternate functions include LPTIM1_OUT, I2C1_SMBA, I2C4_SMBA, OTG_FS_SOF, SWPMI1_RX and SAI1_FS_B. |
| 50 | PA15 | bidirectional | 5 V-tolerant GPIO (FT_l) that after reset is the JTDI debug function with an internal pull-up enabled; alternate functions include TIM2_CH1, TIM2_ETR, USART2_RX, SPI1_NSS, SPI3_NSS, USART3_RTS_DE, UART4_RTS_DE, LCD_SEG17 and SAI2_FS_B. |
| 51 | PC10 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include TRACED1, SPI3_SCK, USART3_TX, UART4_TX, TSC_G3_IO2, DCMI_D8, SDMMC1_D2 and SAI2_SCK_B. |
| 52 | PC11 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include QUADSPI_BK2_NCS, SPI3_MISO, USART3_RX, UART4_RX, TSC_G3_IO3, DCMI_D4, SDMMC1_D3 and SAI2_MCLK_B. |
| 53 | PC12 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, TSC_G3_IO4, DCMI_D9, SDMMC1_CK and SAI2_SD_B. |
| 54 | PD2 | bidirectional | 5 V-tolerant GPIO (FT_l) with LCD capability; alternate functions include TRACED2, TIM3_ETR, USART3_RTS_DE, UART5_RX, TSC_SYNC, DCMI_D11, SDMMC1_CMD and EVENTOUT. |
| 55 | PB3 | bidirectional | GPIO (FT_la, 5 V-tolerant when not used as analog input) that after reset is the JTDO/TRACESWO debug function; alternate functions include TIM2_CH2, SPI1_SCK, SPI3_SCK, USART1_RTS_DE, OTG_FS_CRS_SYNC, LCD_SEG7 and SAI1_SCK_B, and it is also COMP2_INM. |
| 56 | PB4 | bidirectional | GPIO (FT_fla, 5 V-tolerant when not used as analog input) that after reset is the NJTRST debug function with an internal pull-up enabled; alternate functions include TIM3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, USART1_CTS, TSC_G2_IO1, DCMI_D12, LCD_SEG8 and TIM17_BKIN, and it is also COMP2_INP. |
| 57 | PB5 | bidirectional | 5 V-tolerant GPIO (FT_la) with LCD and analog capability; alternate functions include LPTIM1_IN1, TIM3_CH2, CAN2_RX, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, USART1_CK, UART5_CTS, DCMI_D10, LCD_SEG9, COMP2_OUT, SAI1_SD_B and TIM16_BKIN. |
| 58 | PB6 | bidirectional | 5 V-tolerant GPIO (FT_fa) with Fm+ and analog capability; alternate functions include LPTIM1_ETR, TIM4_CH1, TIM8_BKIN2, I2C1_SCL, I2C4_SCL, DFSDM1_DATIN5, USART1_TX, CAN2_TX, DCMI_D5, SAI1_FS_B and TIM16_CH1N, and it is also COMP2_INP. |
| 59 | PB7 | bidirectional | 5 V-tolerant GPIO (FT_fla) with Fm+, LCD and analog capability; alternate functions include LPTIM1_IN2, TIM4_CH2, TIM8_BKIN, I2C1_SDA, I2C4_SDA, USART1_RX, UART4_CTS, DCMI_VSYNC, LCD_SEG21, FMC_NL and TIM17_CH1N, and it is also COMP2_INM and PVD_IN. |
| 60 | PH3-BOOT0 | bidirectional | 5 V-tolerant GPIO (FT) that also serves as the BOOT0 boot-mode pin, which accepts 0 to 9 V per the operating conditions and is otherwise available as EVENTOUT. |
| 61 | PB8 | bidirectional | 5 V-tolerant GPIO (FT_fl) with Fm+ and LCD capability; alternate functions include TIM4_CH3, I2C1_SCL, DFSDM1_DATIN6, CAN1_RX, DCMI_D6, LCD_SEG16, SDMMC1_D4, SAI1_MCLK_A and TIM16_CH1. |
| 62 | PB9 | bidirectional | 5 V-tolerant GPIO (FT_fl) with Fm+ and LCD capability; alternate functions include IR_OUT, TIM4_CH4, I2C1_SDA, SPI2_NSS, DFSDM1_CKIN6, CAN1_TX, DCMI_D7, LCD_COM3, SDMMC1_D5, SAI1_FS_A and TIM17_CH1. |
| 63 | VSS | power_in | Ground pin, which must be connected to the ground supply, with variations between all ground pins limited to 50 mV. |
| 64 | VDD | power_in | Standard operating supply voltage of 1.71 V to 3.6 V for the digital core and I/O. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32L496RGT6TR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32l496rgt6tr-etched.step/stm32l496rgt6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32l496rgt6tr.step/stm32l496rgt6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (280 pp, sha256
d453ac1bbb3eba2d, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).