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STM32F103RET6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f103ret6trfactory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F103RET6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F103RET6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Battery backup supply for RTC and backup domain; 1.8 V to 3.6 V input.
2 PC13-TAMPER-RTC bidirectional GPIO port C bit 13 with limited current (3 mA max); 5 V tolerant; RTC tamper function.
3 PC14-OSC32_IN bidirectional GPIO port C bit 14; 32 kHz external oscillator input for RTC; 5 V tolerant.
4 PC15-OSC32_OUT bidirectional GPIO port C bit 15; 32 kHz external oscillator output; 5 V tolerant.
5 PD0-OSC_IN bidirectional GPIO port D bit 0; configured as OSC_IN (external oscillator input) after reset; remappable to CAN_RX.
6 PD1-OSC_OUT bidirectional GPIO port D bit 1; configured as OSC_OUT (external oscillator output) after reset; remappable to CAN_TX.
7 NRST input System reset pin with internal pull-up (30-50 kΩ) and filtering; VIL max 0.8 V, VIH min 2.0 V.
8 PC0 bidirectional GPIO port C bit 0; 5 V tolerant; ADC123 input channel 10 alternate function.
9 PC1 bidirectional GPIO port C bit 1; 5 V tolerant; ADC123 input channel 11 alternate function.
10 PC2 bidirectional GPIO port C bit 2; 5 V tolerant; ADC123 input channel 12 alternate function.
11 PC3 bidirectional GPIO port C bit 3; 5 V tolerant; ADC123 input channel 13 alternate function; not bonded in WLCSP64.
12 VSSA power_in Analog ground for ADC and DAC; must be connected to VSS.
13 VDDA power_in Analog power supply (2.4 V to 3.6 V) for ADC, DAC, and PLL; must connect to VDD.
14 PA0-WKUP bidirectional GPIO port A bit 0 with wakeup capability from Standby mode; 5 V tolerant; ADC123 channel 0.
15 PA1 bidirectional GPIO port A bit 1; 5 V tolerant; ADC123 channel 1; USART2_RTS alternate function.
16 PA2 bidirectional GPIO port A bit 2; 5 V tolerant; ADC123 channel 2; USART2_TX alternate function.
17 PA3 bidirectional GPIO port A bit 3; 5 V tolerant; ADC123 channel 3; USART2_RX alternate function.
18 VSS power_in
19 VDD power_in
20 PA4 bidirectional GPIO port A bit 4; 5 V tolerant; ADC12 channel 4; SPI1_NSS/DAC_OUT1 alternate functions.
21 PA5 bidirectional GPIO port A bit 5; 5 V tolerant; ADC12 channel 5; SPI1_SCK/DAC_OUT2 alternate functions.
22 PA6 bidirectional GPIO port A bit 6; 5 V tolerant; ADC12 channel 6; SPI1_MISO/TIM3_CH1 alternate functions.
23 PA7 bidirectional GPIO port A bit 7; 5 V tolerant; ADC12 channel 7; SPI1_MOSI/TIM3_CH2 alternate functions.
24 PC4 bidirectional GPIO port C bit 4; 5 V tolerant; ADC12 input channel 14.
25 PC5 bidirectional GPIO port C bit 5; 5 V tolerant; ADC12 input channel 15.
26 PB0 bidirectional GPIO port B bit 0; 5 V tolerant; ADC12 channel 8; TIM3_CH3 alternate function.
27 PB1 bidirectional GPIO port B bit 1; 5 V tolerant; ADC12 channel 9; TIM3_CH4 alternate function.
28 PB2 bidirectional GPIO port B bit 2; 5 V tolerant; boot pin BOOT1 function; can source/sink ±8 mA.
29 PB10 bidirectional GPIO port B bit 10; 5 V tolerant; I2C2_SCL/USART3_TX/TIM2_CH3 alternate functions.
30 PB11 bidirectional GPIO port B bit 11; 5 V tolerant; I2C2_SDA/USART3_RX/TIM2_CH4 alternate functions.
31 VSS power_in
32 VDD power_in
33 PB12 bidirectional GPIO port B bit 12; 5 V tolerant; SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK alternate functions.
34 PB13 bidirectional GPIO port B bit 13; 5 V tolerant; SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N alternate functions.
35 PB14 bidirectional GPIO port B bit 14; 5 V tolerant; SPI2_MISO/TIM1_CH2N/USART3_RTS alternate functions.
36 PB15 bidirectional GPIO port B bit 15; 5 V tolerant; SPI2_MOSI/I2S2_SD/TIM1_CH3N alternate functions.
37 PC6 bidirectional
38 PC7 bidirectional
39 PC8 bidirectional
40 PC9 bidirectional
41 PA8 bidirectional GPIO port A bit 8; 5 V tolerant; USART1_CK/TIM1_CH1/MCO (main clock output) alternate functions.
42 PA9 bidirectional GPIO port A bit 9; 5 V tolerant; USART1_TX/TIM1_CH2 alternate functions.
43 PA10 bidirectional GPIO port A bit 10; 5 V tolerant; USART1_RX/TIM1_CH3 alternate functions.
44 PA11 bidirectional GPIO port A bit 11; 5 V tolerant; USART1_CTS/USB_DM/CAN_RX/TIM1_CH4 alternate functions.
45 PA12 bidirectional GPIO port A bit 12; 5 V tolerant; USART1_RTS/USB_DP/CAN_TX/TIM1_ETR alternate functions.
46 PA13 bidirectional GPIO port A bit 13; 5 V tolerant; JTMS-SWDIO debug interface pin; cannot be used as GPIO.
47 VSS power_in
48 VDD power_in
49 PA14 bidirectional GPIO port A bit 14; 5 V tolerant; JTCK-SWCLK debug interface pin; cannot be used as GPIO.
50 PA15 bidirectional GPIO port A bit 15; 5 V tolerant; JTDI debug/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR alternate functions.
51 PC10 bidirectional GPIO port C bit 10; 5 V tolerant; UART4_TX/SDIO_D2/USART3_TX alternate functions.
52 PC11 bidirectional GPIO port C bit 11; 5 V tolerant; UART4_RX/SDIO_D3/USART3_RX alternate functions.
53 PC12 bidirectional GPIO port C bit 12; 5 V tolerant; UART5_TX/SDIO_CK/USART3_CK alternate functions.
54 PD2 bidirectional
55 PB3 bidirectional GPIO port B bit 3; 5 V tolerant; JTDO debug/SPI3_SCK/I2S3_CK/TRACESWO/TIM2_CH2/SPI1_SCK alternate functions.
56 PB4 bidirectional GPIO port B bit 4; 5 V tolerant; NJTRST debug/SPI3_MISO/PB4/TIM3_CH1/SPI1_MISO alternate functions.
57 PB5 bidirectional GPIO port B bit 5; 5 V tolerant (no FT specified); I2C1_SMBA/SPI3_MOSI/I2S3_SD/TIM3_CH2/SPI1_MOSI alternate functions.
58 PB6 bidirectional GPIO port B bit 6; 5 V tolerant; I2C1_SCL/TIM4_CH1/USART1_TX alternate functions.
59 PB7 bidirectional GPIO port B bit 7; 5 V tolerant; I2C1_SDA/FSMC_NADV/TIM4_CH2/USART1_RX alternate functions.
60 BOOT0 input Boot mode pin (active high); determines boot from flash, system memory, or SRAM on reset.
61 PB8 bidirectional GPIO port B bit 8; 5 V tolerant; TIM4_CH3/SDIO_D4/I2C1_SCL/CAN_RX alternate functions.
62 PB9 bidirectional GPIO port B bit 9; 5 V tolerant; TIM4_CH4/SDIO_D5/I2C1_SDA/CAN_TX alternate functions.
63 VSS power_in
64 VDD power_in

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F103RET6TR
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f103ret6tr-etched.step / stm32f103ret6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f103ret6tr.step / stm32f103ret6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (143 pp, sha256 c61db5e362b62f2f, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF