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GD32F303CET6

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GigaDevice Semicon Beijing Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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GD32F303CET6

GigaDevice Semicon Beijing · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

GD32F303CET6 from GigaDevice Semicon Beijing, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup-domain supply pin; the pin definition table lists only its default function VBAT.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O PC13 by default, with alternate function TAMPER-RTC.
3 PC14-OSC32IN bidirectional General-purpose I/O PC14 by default, with alternate function OSC32IN.
4 PC15-OSC32OUT bidirectional General-purpose I/O PC15 by default, with alternate function OSC32OUT.
5 OSCIN input Default function OSCIN (oscillator input), remappable to PD0, which cannot be used for EXTI in this package.
6 OSCOUT output Default function OSCOUT (oscillator output), remappable to PD1, which cannot be used for EXTI in this package.
7 NRST bidirectional Reset pin with default function NRST; electrical limits are given in the NRST pin characteristics section, not in the pin table.
8 VSSA power_in Analog ground pin with default function VSSA.
9 VDDA power_in Analog supply pin with default function VDDA.
10 PA0-WKUP bidirectional General-purpose I/O PA0 by default; alternates WKUP, USART1_CTS, ADC012_IN0, TIMER1_CH0, TIMER1_ETI and TIMER4_CH0.
11 PA1 bidirectional General-purpose I/O PA1 by default; alternates USART1_RTS, ADC012_IN1, TIMER1_CH1 and TIMER4_CH1.
12 PA2 bidirectional General-purpose I/O PA2 by default; alternates USART1_TX, ADC012_IN2, TIMER1_CH2, TIMER4_CH2 and SPI0_IO2.
13 PA3 bidirectional General-purpose I/O PA3 by default; alternates USART1_RX, ADC012_IN3, TIMER1_CH3, TIMER4_CH3 and SPI0_IO3.
14 PA4 bidirectional General-purpose I/O PA4 by default; alternates SPI0_NSS, USART1_CK, ADC01_IN4 and DAC_OUT0; remap SPI2_NSS and I2S2_WS.
15 PA5 bidirectional General-purpose I/O PA5 by default; alternates SPI0_SCK, ADC01_IN5 and DAC_OUT1.
16 PA6 bidirectional General-purpose I/O PA6 by default; alternates SPI0_MISO, ADC01_IN6 and TIMER2_CH0; remap TIMER0_BRKIN.
17 PA7 bidirectional General-purpose I/O PA7 by default; alternates SPI0_MOSI, ADC01_IN7 and TIMER2_CH1; remap TIMER0_CH0_ON.
18 PB0 bidirectional General-purpose I/O PB0 by default; alternates ADC01_IN8 and TIMER2_CH2; remap TIMER0_CH1_ON.
19 PB1 bidirectional General-purpose I/O PB1 by default; alternates ADC01_IN9 and TIMER2_CH3; remap TIMER0_CH2_ON.
20 PB2 bidirectional 5 V tolerant I/O; default function PB2, which is also BOOT1.
21 PB10 bidirectional 5 V tolerant I/O; default PB10, alternates I2C1_SCL and USART2_TX; remap TIMER1_CH2.
22 PB11 bidirectional 5 V tolerant I/O; default PB11, alternates I2C1_SDA and USART2_RX; remap TIMER1_CH3.
23 VSS_1 power_in Ground pin with default function VSS_1.
24 VDD_1 power_in Supply pin with default function VDD_1.
25 PB12 bidirectional 5 V tolerant I/O; default PB12, alternates SPI1_NSS, I2C1_SMBA, USART2_CK, TIMER0_BRKIN and I2S1_WS.
26 PB13 bidirectional 5 V tolerant I/O; default PB13, alternates SPI1_SCK, USART2_CTS, TIMER0_CH0_ON and I2S1_CK.
27 PB14 bidirectional 5 V tolerant I/O; default PB14, alternates SPI1_MISO, USART2_RTS and TIMER0_CH1_ON.
28 PB15 bidirectional 5 V tolerant I/O; default PB15, alternates SPI1_MOSI, TIMER0_CH2_ON and I2S1_SD.
29 PA8 bidirectional 5 V tolerant I/O; default PA8, alternates USART0_CK, TIMER0_CH0, CK_OUT0 and CTC_SYNC.
30 PA9 bidirectional 5 V tolerant I/O; default PA9, alternates USART0_TX and TIMER0_CH1.
31 PA10 bidirectional 5 V tolerant I/O; default PA10, alternates USART0_RX and TIMER0_CH2.
32 PA11 bidirectional 5 V tolerant I/O; default PA11, alternates USART0_CTS, CAN0_RX, USBDM and TIMER0_CH3.
33 PA12 bidirectional 5 V tolerant I/O; default PA12, alternates USART0_RTS, CAN0_TX, TIMER0_ETI and USBDP.
34 PA13 bidirectional 5 V tolerant I/O; default function JTMS/SWDIO, remappable to PA13.
35 VSS_2 power_in Ground pin with default function VSS_2.
36 VDD_2 power_in Supply pin with default function VDD_2.
37 PA14 bidirectional 5 V tolerant I/O; default function JTCK/SWCLK, remappable to PA14.
38 PA15 bidirectional 5 V tolerant I/O; default function JTDI, alternates SPI2_NSS and I2S2_WS; remaps include TIMER1_CH0, TIMER1_ETI and SPI0_NSS.
39 PB3 bidirectional 5 V tolerant I/O; default function JTDO, alternates SPI2_SCK and I2S2_CK; remaps include TRACESWO, TIMER1_CH1 and SPI0_SCK.
40 PB4 bidirectional 5 V tolerant I/O; default function NJTRST, alternate SPI2_MISO; remaps include TIMER2_CH0 and SPI0_MISO.
41 PB5 bidirectional I/O with default PB5, alternates I2C0_SMBA, SPI2_MOSI and I2S2_SD; remaps include TIMER2_CH1 and SPI0_MOSI; no 5 V tolerance is listed for this pin.
42 PB6 bidirectional 5 V tolerant I/O; default PB6, alternates I2C0_SCL and TIMER3_CH0; remaps include USART0_TX and SPI0_IO2.
43 PB7 bidirectional 5 V tolerant I/O; default PB7, alternates I2C0_SDA and TIMER3_CH1; remaps include USART0_RX and SPI0_IO3.
44 BOOT0 input Boot selection input with default function BOOT0.
45 PB8 bidirectional 5 V tolerant I/O; default PB8, alternate TIMER3_CH2; remaps include I2C0_SCL and CAN0_RX.
46 PB9 bidirectional 5 V tolerant I/O; default PB9, alternate TIMER3_CH3; remaps include I2C0_SDA and CAN0_TX.
47 VSS_3 power_in Ground pin with default function VSS_3.
48 VDD_3 power_in Supply pin with default function VDD_3.

Key specifications

Parameter Value
Manufacturer GigaDevice Semicon Beijing
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage on 5V tolerant pin (absolute cap, note 3) VIN 6.5 V VIN maximum value cannot exceed 6.5 V 51
Input voltage on other I/O VIN 3.6 V 51
Variations between different VDD power pins /ΔVDDX/ 50 mV 51
Variations between different ground pins /VSSX −VSS/ 50 mV 51
Maximum current for GPIO pins IIO -25 25 mA 51
Operating temperature range TA -40 85 °C 51
Storage temperature range TSTG -55 150 °C 51
Maximum junction temperature TJ 125 °C 51
Supply voltage VDD 2.6 3.3 3.6 V 51
Analog supply voltage VDDA 2.6 3.3 3.6 V Same as VDD 51
Battery supply voltage VBAT 1.8 3.6 V 51
AHB clock frequency fHCLK 120 MHz 52
APB1 clock frequency fAPB1 60 MHz 52
APB2 clock frequency fAPB2 120 MHz 52
VDD rise time rate tVDD 0 μs/V 52
VDD fall time rate tVDD 20 μs/V 52
Electrostatic discharge voltage (human body model) VESD(HBM) 4000 V TA = 25 °C; JESD22-A114 62
Electrostatic discharge voltage (charge device model) VESD(CDM) 800 V TA = 25 °C; JESD22-C101 62
Static latch-up I-test LU I-test -200 200 mA TA = 25 °C; JESD78 62
Static latch-up supply over voltage 5.4 V 62
Crystal or ceramic frequency (HXTAL) fHXTAL 4 8 32 MHz 2.6 V ≤ VDD ≤ 3.6 V 63
Recommended matching capacitance on OSCIN and OSCOUT CHXTAL 20 30 pF 63
Crystal or ceramic duty cycle (HXTAL) Ducy(HXTAL) 30 50 70 % 63
External clock source or oscillator frequency (HXTAL bypass) fHXTAL_ext 1 50 MHz VDD = 3.3 V 63
External clock source or oscillator frequency (LXTAL bypass) fLXTAL_ext 32.768 1000 kHz VDD = 3.3 V 64
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -2.5 2.5 % VDD = VDDA = 3.3 V, TA = -40 °C ~ +85 °C 65
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1.8 1.8 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 65
IRC8M oscillator frequency accuracy, factory-trimmed ACCIRC8M -1 1 % VDD = VDDA = 3.3 V, TA = 25 °C 65
IRC8M oscillator duty cycle DucyIRC8M 45 50 55 % VDD = VDDA = 3.3 V 65
Low speed internal oscillator (IRC40K) frequency fIRC40K 20 40 45 kHz VDD = VDDA = 3.3 V, TA = -40°C ~ +85 °C 65
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -4 5 % VDD = VDDA = 3.3 V, TA = -40°C ~ +85 °C 66
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -3 3 % VDD = VDDA = 3.3 V, TA = 0 °C ~ +85 °C 66
IRC48M oscillator frequency accuracy, factory-trimmed ACCIRC48M -2 2 % VDD = VDDA = 3.3 V, TA = 25 °C 66
IRC48M oscillator duty cycle DIRC48M 45 50 55 % VDD = VDDA = 3.3 V 66
PLL input clock frequency fPLLIN 1 25 MHz 66
PLL output clock frequency fPLLOUT 16 120 MHz 66
PLL VCO output clock frequency fVCO 32 240 MHz 66
PLL lock time tLOCK 300 μs 66
Number of guaranteed program/erase cycles before failure (endurance) PECYC 100 kcycles TA = -40 °C ~ +85 °C 67
Word programming time tPROG 37.5 86 μs TA = -40°C ~ +85 °C 67
Page erase time tERASE 45 ms TA = -40°C ~ +85 °C 67
NRST input low level voltage VIL(NRST) -0.5 V 2.6 V ≤ VDD = VDDA ≤ 3.6 V 67
Low level output voltage for an IO pin (IIO = +8mA) VOL 0.17 V IIO = +8mA; VDD = 2.6 V 68
Low level output voltage for an IO pin (IIO = +8mA) VOL 0.16 V IIO = +8mA; VDD = 3.3 V 68
Low level output voltage for an IO pin (IIO = +8mA) VOL 0.15 V IIO = +8mA; VDD = 3.6 V 68
High level output voltage for an IO pin (IIO = +8mA) VOH 2.4 V IIO = +8mA; VDD = 2.6 V 68
High level output voltage for an IO pin (IIO = +8mA) VOH 3.15 V IIO = +8mA; VDD = 3.3 V 68
High level output voltage for an IO pin (IIO = +8mA) VOH 3.44 V IIO = +8mA; VDD = 3.6 V 68
Internal pull-up resistor RPU 30 40 50 kΩ All pins VIN = VSS 68
Internal pull-up resistor RPU 7.5 10 13.5 kΩ PA10 68
Internal pull-down resistor RPD 30 40 50 kΩ All pins VIN = VDD 68
Internal pull-down resistor RPD 7.5 10 13.5 kΩ PA10 68
Operating voltage (ADC) VDDA 2.6 3.3 3.6 V 69
Positive reference voltage (ADC) VREF+ 2.4 V 69
ADC clock fADC 0.1 40 MHz 70

CAD (KiCad official)

  • Symbol: GD32F303CET6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: gd32f303cet6-etched.step / gd32f303cet6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); gd32f303cet6.step / gd32f303cet6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GigaDevice Semicon Beijing datasheet (91 pp, sha256 f3a21ce565c85040, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF