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TMI7608R

Public Made by Adom

by adom

TMI Power Over Ethernet (PoE) Controllers, QFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tmi7608rfactory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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TMI7608R

TMI · Power Over Ethernet (PoE) Controllers · QFN-48(7x7)

TMI7608R from TMI, in a QFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND power_in Analog ground.
2 NC unconnected No internal connection.
3 PortN0 input Port 0 negative feeding voltage input.
4 AGND power_in Analog ground.
5 PortN1 input Port 1 negative feeding voltage input.
6 AGND power_in Analog ground.
7 NC unconnected No internal connection.
8 PortN2 input Port 2 negative feeding voltage input.
9 AGND power_in Analog ground.
10 PortN3 input Port 3 negative feeding voltage input.
11 AGND power_in Analog ground.
12 SCAN_MODE input Internally pulled down to AGND; connect to AGND for normal operation.
13 ALT_A/B input Latched at power-on reset to select ALT_A (0, default) or ALT_B (1); internally pulled down to DGND.
14 EN_CL4+ input Class4+ enable input referenced to DGND, internally pulled down; leave open for 802.3at mode or connect to V3P3 to enable Class4+ classification, latched at power-up or reset.
15 PMAX input Maximum total power setting pin; connect a 75kΩ resistor to AGND, Pmax=Rmax78uAV54, latched at power-up or reset.
16 NC unconnected No internal connection.
17 V54 power_in Main power supply input (44~57V); add a 1uF capacitor between V54 and AGND.
18 AGND power_in Analog ground.
19 AUTO input Auto/shutdown mode input referenced to AGND, internally pulled up to V3P3; leave open for auto mode or connect to DGND for default shutdown mode, latched at power-up or reset.
20 V3P3 power_out Built-in 3.3V regulator output (6mA for external devices) when EnB_Reg is tied to AGND, or external 3.3V (6mA minimum) input when EnB_Reg is tied to 3.3V; use a 4.7uF capacitor to AGND.
21 2-EVENT input 2-Event classification select referenced to AGND, internally pulled up; leave open to enable, force low to disable.
22 VPP passive eFuse power, internally connected; leave unconnected.
23 NC unconnected No internal connection.
24 EnB_Reg input Enables or disables the internal 3.3V regulator (see V3P3); internally pulled up to V3P3.
25 24V_EN input Latched at power-on reset to enable (1) or disable (0, default) 24V mode; internally pulled down to DGND.
26 AGND power_in Analog ground.
27 PortN4 input Port 4 negative feeding voltage input.
28 AGND power_in Analog ground.
29 PortN5 input Port 5 negative feeding voltage input.
30 NC unconnected No internal connection.
31 AGND power_in Analog ground.
32 PortN6 input Port 6 negative feeding voltage input.
33 AGND power_in Analog ground.
34 PortN7 input Port 7 negative feeding voltage input.
35 NC unconnected No internal connection.
36 AGND power_in Analog ground.
37 LED_CLK output Serial LED clock output.
38 LED_DAT output Serial LED data output, internally pulled up to DV3P3.
39 SCL/EE_CLK bidirectional I2C clock input when AUTO=0; clock output to EEPROM when AUTO=1.
40 SDAO output I2C serial data output.
41 SDAI/EE_DAT input I2C serial data input when AUTO=0; data input from EEPROM when AUTO=1.
42 INTB output Active-low interrupt output.
43 DGND power_in Digital ground, should be connected to AGND.
44 DV3P3 power_in Digital 3.3V supply, internally connected to V3P3 and usually also connected externally to V3P3.
45 RstN input Active-low reset input for the TMI7608R.
46 AD2 input I2C device address bit AD2.
47 AD1 input I2C device address bit AD1.
48 AD0 input I2C device address bit AD0.
49 EPAD power_in Exposed pad, should be connected to AGND.

Key specifications

Parameter Value
Manufacturer TMI
Package QFN-48(7x7)
Category Power Management (PMIC)
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage V54-AGND -0.3 90 V 6
PortN0~PortN3 PortNn-AGND -0.3 90 V n=0~7 6
All other pins -0.3 6 V relative to AGND or DGND 6
DGND to AGND DGND-AGND -0.3 0.3 V 6
Maximum Junction Temperature 150 °C 6
Storage Temperature Range -65 150 °C 6
Lead Temperature 260 °C 30s, reflow 6
Operating Ambient Temperature TA -40 85 °C 6
ESD HBM VESD_HBM -2000 2000 V ANSI/ESDA/JEDEC JS-001-2017, Class 2 6
ESD CDM VESD_CDM -1000 1000 V JS-002-2018, Class C3 6
Latch-up ILATCH-UP -200 200 mA JEDEC 78E, Class I 6
Power Supply voltage V54 32 60 V 45V~57V @IEEE802.3af 7
Power Supply voltage (at) V54 50 60 V 51V~57V @IEEE802.3at 7
V54 operating current I54 8 10 mA All ports on @w/o peripheral load current & port load current 7
V3P3 voltage V3P3 3 3.3 3.6 V IV3P3=0~10mA 7
V3P3 Undervoltage Lockout V3P3_UVLO 2 V 7
Foldback Initial Voltage (af) VFLBK_ST 32 V IEEE802.3af 7
Foldback Initial Voltage (at) VFLBK_ST 18 V IEEE802.3at 7
Foldback Final Voltage VFLBK_END 46 V V54 - VPortN_ above which the current limit reaches VTH_FB 7
Minimum Foldback Current-Limit Threshold ILIM-TH_FB 120 mA VPortN_= V54 = 57V 7
RS_ Input Bias Current -2 μA VRS_= AGND 7
Output current in POWER_UP State IInrush 400 450 mA 7
Short Circuit Current Limit Threshold ILIM 400 500 mA Class0~3 7
Short Circuit Current Limit Threshold ILIM 750 1000 mA Class4 7
Short Circuit Current Limit Threshold ILIM 2000 mA Class4+ 7
Overcurrent Threshold after Startup ICUT 350 375 400 mA Class0 7
Overcurrent Threshold after Startup ICUT 91 112 133 mA Class1 7
Overcurrent Threshold after Startup ICUT 160 206 252 mA Class2 7
Overcurrent Threshold after Startup ICUT 600 640 680 mA Class4 7
Overcurrent Threshold after Startup ICUT 1200 1280 1360 mA Class4+ 7
V54 Undervoltage Lockout VUVLO 30 V V54-AGND, V54-AGND increasing 8
V54 Undervoltage Lockout Hysteresis VUVLO_H 3 V Ports shut down if: V54 - AGND < AGND_UVLO - AGND_UVLOH 8
Thermal-Shutdown Threshold TSHD 150 °C junction temperature increasing (test mode) (Note 4) 8
Thermal-Shutdown Hysteresis TSHDN 20 °C Temperature decreasing (Note 4) 8
Idle Pullup Resistance at PortN_ RDIS 0.7 1 1.25 MΩ Detection and classification off, port shut down 8
PGOOD High Threshold PGTH 1.5 2 2.5 V VPortN_ - AGND, PortN_ decreasing 8
PGOOD Hysteresis PGHYS 220 mV 8
PGOOD Low-to-High Glitch Filter Time tPGOOD 2 4 ms 8
DC Load Disconnect Threshold IMPSTH 5 7.5 10 mA Minimum Iport allowed before disconnect (DC disconnect active), VPortN_ = 0V 8
Load Disconnect Time tDISC 300 350 400 ms Time from VRS_ < VDCTH to gate shutdown 8
Detection Probe Voltage (First Phase) VDPH1 3.8 4 4.2 V V54 - VDET during the first detection phase 9
Detection Probe Voltage (Second Phase) VDPH2 8.6 9 9.4 V V54 - VDET during the second detection phase 9
Detection Current-Limit Protection IDLIM 1.5 2 mA VPortN_ = V54, current measured through PortN_ during detection 9
Resistor Detection Window RDOK 19 26.5 kΩ Note 5 9
Classification Probe Voltage VCL 15.5 20 V V54 - VPortN_ during classification 9
Classification Current-Limit Protection ICL_LIM 60 70 80 mA VPortN_ = V54, current measured through PortN 9
Classification Event Timing tCL_E 14 18 22 ms 9
Mark Event Voltage VMARK 8 9.6 V V54 - VDET during mark event 9
Mark Event Current Limit IMARK_LIM 34 40 46 mA VDET = V54, during mark event measure current through DET 9
Mark Event Timing tMARK_E 7 9 11 ms 9
Classification Current Threshold Class 0/1 ICL 5 6.5 8 mA Class 0, Class 1 9
Classification Current Threshold Class 1/2 ICL 13 14.5 16 mA Class 1, Class 2 9
Classification Current Threshold Class 2/3 ICL 21 23 25 mA Class 2, Class 3 9
Classification Current Threshold Class 3/4 ICL 31 33 35 mA Class 3, Class 4 9
Classification Current Threshold Class 4 upper limit ICL 45 48 51 mA Class 4 upper limit (Note 6) 9
Digital Input Low VIL 0.8 V 10
Digital Input High VIH 2 V 10
Internal Input Pullup/Pulldown Resistor RDIN 25 50 75 kΩ Pullup (pulldown) resistor to V3P3 (DGND) to set default level 10
Open-Drain output Low Voltage VOL 0.4 V ISINK = 10mA 10
Open-Drain Leakage IOL 1 μA Open-drain high impedance, VPortN_ = 3.3V 10
Startup Time tSTART 50 60 70 ms current limit set by VSU_LIM allowed, starts when GATE_ is turned on 10
Fault Time tFAULT 50 60 70 ms Time allowed for an overcurrent fault set by VFLT_LIM after startup 10
Port on resistance Ron 0.15 Ω Iport ≦ 640mA, & Ta=25℃ 10
Restart Timer tRESTART 1.6 2 2.4 s after an overcurrent fault, ALT_A/B disabled 10

CAD (KiCad official)

  • Symbol: TMI7608R
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: QFN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: tmi7608r-etched.step / tmi7608r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tmi7608r.step / tmi7608r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TMI datasheet (29 pp, sha256 3d1ad5b3511b47b5, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF