component
CD4075BE
Public Made by Adomby adom
lingxingic Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4075BE
lingxingic · Logic Gates · DIP-14
CD4075BE from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 2A | input | Data input A of OR gate 2; unused inputs must be connected to VDD, GND, or another input. |
| 2 | 2B | input | Data input B of OR gate 2; unused inputs must be connected to VDD, GND, or another input. |
| 3 | 1A | input | Data input A of OR gate 1; unused inputs must be connected to VDD, GND, or another input. |
| 4 | 1B | input | Data input B of OR gate 1; unused inputs must be connected to VDD, GND, or another input. |
| 5 | 1C | input | Data input C of OR gate 1; unused inputs must be connected to VDD, GND, or another input. |
| 6 | 1Y | output | Fully buffered data output of OR gate 1 (1Y is HIGH when any of 1A, 1B, 1C is HIGH). |
| 7 | GND | power_in | Ground (0 V) reference for all voltages; the device operates from a recommended VDD of 3 V to 15 V referenced to GND. |
| 8 | 2C | input | Data input C of OR gate 2; unused inputs must be connected to VDD, GND, or another input. |
| 9 | 2Y | output | Fully buffered data output of OR gate 2 (2Y is HIGH when any of 2A, 2B, 2C is HIGH). |
| 10 | 3Y | output | Fully buffered data output of OR gate 3 (3Y is HIGH when any of 3A, 3B, 3C is HIGH). |
| 11 | 3C | input | Data input C of OR gate 3; unused inputs must be connected to VDD, GND, or another input. |
| 12 | 3B | input | Data input B of OR gate 3; unused inputs must be connected to VDD, GND, or another input. |
| 13 | 3A | input | Data input A of OR gate 3; unused inputs must be connected to VDD, GND, or another input. |
| 14 | VDD | power_in | Supply voltage; recommended range 3 V to 15 V referenced to GND, absolute maximum 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply current | IDD | 1 | uA | VIN 0,5 V; VDD 5 V; Tamb=25℃ | 7 | ||
| LOW-level output current | IOL | 0.51 | 1 | mA | VO 0.4 V; VIN 0,5 V; VDD 5 V; Tamb=25℃ | 7 | |
| LOW-level output current | IOL | 1.3 | 2.6 | mA | VO 0.5 V; VIN 0,10 V; VDD 10 V; Tamb=25℃ | 7 | |
| LOW-level output current | IOL | 3.4 | 6.8 | mA | VO 1.5 V; VIN 0,15 V; VDD 15 V; Tamb=25℃ | 7 | |
| HIGH-level output current | IOH | -0.51 | -1 | mA | VO 4.6 V; VIN 0,5 V; VDD 5 V; Tamb=25℃ | 7 | |
| HIGH-level output current | IOH | -1.6 | -3.2 | mA | VO 2.5 V; VIN 0,5 V; VDD 5 V; Tamb=25℃ | 7 | |
| HIGH-level output current | IOH | -1.3 | -2.6 | mA | VO 9.5 V; VIN 0,10 V; VDD 10 V; Tamb=25℃ | 7 | |
| HIGH-level output current | IOH | -3.4 | -6.8 | mA | VO 13.5 V; VIN 0,15 V; VDD 15 V; Tamb=25℃ | 7 | |
| LOW-level output voltage | VOL | 0 | 0.05 | V | VIN 0,5 V; VDD 5 V; Tamb=25℃ | 7 | |
| HIGH-level output voltage | VOH | 4.95 | 5 | V | VIN 0,5 V; VDD 5 V; Tamb=25℃ | 7 | |
| HIGH-level output voltage | VOH | 9.95 | 10 | V | VIN 0,10 V; VDD 10 V; Tamb=25℃ | 7 | |
| HIGH-level output voltage | VOH | 14.95 | 15 | V | VIN 0,15 V; VDD 15 V; Tamb=25℃ | 7 | |
| LOW-level input voltage | VIL | 5 | 1.5 | V | VO 0.5, 4.5 V; VDD 5 V; Tamb=25℃ | 7 | |
| LOW-level input voltage | VIL | 10 | 3 | V | VO 1, 9 V; VDD 10 V; Tamb=25℃ | 7 | |
| LOW-level input voltage | VIL | 15 | 4 | V | VO 1.5, 13.5 V; VDD 15 V; Tamb=25℃ | 7 | |
| HIGH-level input voltage | VIH | 3.5 | 5 | V | VO 4.5 V; VDD 5 V; Tamb=25℃ | 7 | |
| HIGH-level input voltage | VIH | 7 | 10 | V | VO 9 V; VDD 10 V; Tamb=25℃ | 7 | |
| HIGH-level input voltage | VIH | 11 | 15 | V | VO 13.5 V; VDD 15 V; Tamb=25℃ | 7 | |
| input leakage current | II | -1 | 1 | uA | VIN 0,15 V; VDD 15 V; Tamb=25℃ | 7 | |
| supply current | IDD | 7.5 | uA | VIN 0,5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| supply current | IDD | 15 | uA | VIN 0,10 V; VDD 10 V; Tamb=+125℃ | 8 | ||
| supply current | IDD | 30 | uA | VIN 0,15 V; VDD 15 V; Tamb=+125℃ | 8 | ||
| LOW-level output current | IOL | 0.36 | mA | VO 0.4 V; VIN 0,5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| LOW-level output current | IOL | 0.9 | mA | VO 0.5 V; VIN 0,10 V; VDD 10 V; Tamb=+125℃ | 8 | ||
| LOW-level output current | IOL | 2.4 | mA | VO 1.5 V; VIN 0,15 V; VDD 15 V; Tamb=+125℃ | 8 | ||
| HIGH-level output current | IOH | -0.36 | mA | VO 4.6 V; VIN 0,5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| HIGH-level output current | IOH | -1.15 | mA | VO 2.5 V; VIN 0,5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| HIGH-level output current | IOH | -0.9 | mA | VO 9.5 V; VIN 0,10 V; VDD 10 V; Tamb=+125℃ | 8 | ||
| HIGH-level output current | IOH | -2.4 | mA | VO 13.5 V; VIN 0,15 V; VDD 15 V; Tamb=+125℃ | 8 | ||
| LOW-level output voltage | VOL | 0.05 | V | VIN 0,5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| HIGH-level output voltage | VOH | 4.95 | V | VIN 0,5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| HIGH-level output voltage | VOH | 9.95 | V | VIN 0,10 V; VDD 10 V; Tamb=+125℃ | 8 | ||
| HIGH-level output voltage | VOH | 14.95 | V | VIN 0,15 V; VDD 15 V; Tamb=+125℃ | 8 | ||
| LOW-level input voltage | VIL | 1.5 | V | VO 0.5, 4.5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| LOW-level input voltage | VIL | 3 | V | VO 1, 9 V; VDD 10 V; Tamb=+125℃ | 8 | ||
| LOW-level input voltage | VIL | 4 | V | VO 1.5, 13.5 V; VDD 15 V; Tamb=+125℃ | 8 | ||
| HIGH-level input voltage | VIH | 3.5 | V | VO 4.5 V; VDD 5 V; Tamb=+125℃ | 8 | ||
| HIGH-level input voltage | VIH | 7 | V | VO 9 V; VDD 10 V; Tamb=+125℃ | 8 | ||
| HIGH-level input voltage | VIH | 11 | V | VO 13.5 V; VDD 15 V; Tamb=+125℃ | 8 | ||
| propagation delay time | tPHL, tPLH | 125 | 250 | ns | see Figure 4; VDD=5V; Tamb=25℃ | 8 | |
| propagation delay time | tPHL, tPLH | 60 | 120 | ns | see Figure 4; VDD=10V; Tamb=25℃ | 8 | |
| propagation delay time | tPHL, tPLH | 45 | 90 | ns | see Figure 4; VDD=15V; Tamb=25℃ | 8 | |
| transition time | tTHL, tTLH | 100 | 200 | ns | see Figure 4; VDD=5V; Tamb=25℃ | 8 | |
| transition time | tTHL, tTLH | 50 | 100 | ns | see Figure 4; VDD=10V; Tamb=25℃ | 8 | |
| transition time | tTHL, tTLH | 40 | 80 | ns | see Figure 4; VDD=15V; Tamb=25℃ | 8 | |
| input capacitance | CI | 5 | 7.5 | pF | any input; Tamb=25℃ | 8 | |
| supply voltage | VDD | -0.5 | 18 | V | 6 | ||
| DC input current | IIK | -10 | 10 | mA | any one input | 6 | |
| input voltage | VI | -0.5 | V | all inputs; printed max is VDD+0.5 V (expression) | 6 | ||
| storage temperature | Tstg | -65 | 150 | ℃ | 6 | ||
| total power dissipation | Ptot | 500 | mW | 6 | |||
| device dissipation per output transistor | P | 100 | mW | per output transistor | 6 | ||
| supply voltage | VDD | 3 | 15 | V | 7 | ||
| ambient temperature | Tamb | -40 | 125 | ℃ | in free air | 7 |
CAD (KiCad official)
- Symbol:
CD4075BE - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
cd4075be-etched.step/cd4075be-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4075be.step/cd4075be.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: lingxingic datasheet (13 pp, sha256
04212aa671a012ba, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).