component
BQ40Z50RSMT-R1
Public Made by Adomby adom
Texas Instruments Battery Management ICs, VQFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownBQ40Z50RSMT-R1
Texas Instruments · Battery Management ICs · VQFN-32-EP(4x4)
BQ40Z50RSMT-R1 from Texas Instruments, in a VQFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PBI | power_in | Power supply backup input pin. |
| 2 | VC4 | input | Sense voltage input pin for most positive cell, and balance current input for most positive cell. |
| 3 | VC3 | input | Sense voltage input pin for second most positive cell, balance current input for second most positive cell, and return balance current for most positive cell. |
| 4 | VC2 | input | Sense voltage input pin for third most positive cell, balance current input for third most positive cell, and return balance current for second most positive cell. |
| 5 | VC1 | input | Sense voltage input pin for least positive cell, balance current input for least positive cell, and return balance current for third most positive cell. |
| 6 | SRN | input | Analog input pin connected to the internal coulomb counter peripheral for integrating a small voltage between SRP and SRN where SRP is the top of the sense resistor. |
| 7 | NC | unconnected | Not internally connected. Connect to VSS. |
| 8 | SRP | input | Analog input pin connected to the internal coulomb counter peripheral for integrating a small voltage between SRP and SRN where SRP is the top of the sense resistor. |
| 9 | VSS | power_in | Device ground. |
| 10 | TS1 | input | Temperature sensor 1 thermistor input pin. |
| 11 | TS2 | input | Temperature sensor 2 thermistor input pin. |
| 12 | TS3 | input | Temperature sensor 3 thermistor input pin. |
| 13 | TS4 | input | Temperature sensor 4 thermistor input pin. |
| 14 | NC | unconnected | Not internally connected. |
| 15 | BTP_INT | output | Battery Trip Point (BTP) interrupt output. |
| 16 | PRES or SHUTDN | input | Host system present input for removable battery pack or emergency system shutdown input for embedded pack. |
| 17 | DISP | output | Display control for LEDs. |
| 18 | SMBD | bidirectional | SMBus data pin. |
| 19 | SMBC | bidirectional | SMBus clock pin. |
| 20 | LEDCNTLA | output | LED display segment that drives the external LEDs depending on the firmware configuration. |
| 21 | LEDCNTLB | output | LED display segment that drives the external LEDs depending on the firmware configuration. |
| 22 | LEDCNTLC | output | LED display segment that drives the external LEDs depending on the firmware configuration. |
| 23 | PTC | input | Safety PTC thermistor input pin. To disable, connect both PTC and PTCEN to VSS. |
| 24 | PTCEN | input | Safety PTC thermistor enable input pin. Connect to BAT. To disable, connect both PTC and PTCEN to VSS. |
| 25 | FUSE | output | Fuse drive output pin. |
| 26 | VCC | power_in | Secondary power supply input. |
| 27 | PACK | input | Pack sense input pin. |
| 28 | DSG | output | NMOS Discharge FET drive output pin. |
| 29 | NC | unconnected | Not internally connected. |
| 30 | PCHG | output | PMOS Precharge FET drive output pin. |
| 31 | CHG | output | NMOS Charge FET drive output pin. |
| 32 | BAT | power_in | Primary power supply input pin. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(4x4) |
| Category | Power Supply Chip |
| Pins | 33 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | if one becomes shorted. To have good ESD protection, the copper trace inductance of the capacitor leads must | 29 |
CAD (KiCad official)
- Symbol:
BQ40Z50RSMT-R1 - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: VQFN-32-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq40z50rsmt-r1-etched.step/bq40z50rsmt-r1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq40z50rsmt-r1.step/bq40z50rsmt-r1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (54 pp, sha256
0eb62413e2d29ec2, retrieved 2026-10-28, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).