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BY25Q128ESSIG

Public Made by Adom

by adom

BOYAMICRO NOR FLASH, SOP-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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BY25Q128ESSIG

BOYAMICRO · NOR FLASH · SOP-8-208mil

BY25Q128ESSIG from BOYAMICRO, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input Chip select: driving it high deselects the device and makes the outputs high impedance, and a falling edge on /CS is required before any instruction after power-up (page 6, section 2.2).
2 SO (IO1) bidirectional Serial data output for single-bit instructions, shifted out on the falling edge of SCLK, and IO1 for Dual or Quad instructions (page 7, section 2.5).
3 /WP (IO2) bidirectional Write protect, which with SRP1/SRP0 set to 0/1 and /WP low prevents writes to the Status Register; it has an internal pull-up, is replaced by IO2 in Quad mode, and is unavailable when QE=1 (page 7, section 2.6).
4 VSS power_in Ground reference for the device (page 6, Table 1 Signal Names).
5 SI (IO0) bidirectional Serial data input latched on the rising edge of SCLK for instructions, addresses and program data, and IO0 for Dual or Quad instructions (page 7, section 2.4).
6 SCLK input Serial clock that provides the synchronization reference for the SPI interface, with inputs latched on the rising edge and data output changing after the falling edge (page 6, section 2.3).
7 /HOLD (IO3) bidirectional Hold pin that pauses serial transfer when low with SCLK low, is only available when QE=0 (otherwise it is IO3), and has an internal pull-up (page 7, section 2.7).
8 VCC power_in Single core and I/O power supply, operating from 2.7 V to 3.6 V and held stable within the valid range during all operations (page 7, section 2.8 and page 4 description).

Key specifications

Parameter Value
Manufacturer BOYAMICRO
Package SOP-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC -0.5 4 V 67
Voltage Applied to Any Pin VIO -0.5 4 V Relative to Ground 67
Transient Voltage on any Pin (lower limit) VIOT -2 V <20nS Transient, Relative to Ground 67
Transient Voltage on any Pin (upper limit) VIOT 2 V rel. VCC <20nS Transient, Relative to Ground; printed as VCC+2.0V 67
Storage Temperature TSTG -65 150 °C 67
Electrostatic Discharge Voltage VESD -2000 2000 V Human Body Model 67
Supply Voltage (operating range) VCC 2.7 3.6 V 67
Operating Temperature, Commercial TA 0 70 °C Commercial 67
Operating Temperature, Industrial TA -40 85 °C Industrial 67
Input Voltage on I/O pins (lower limit) -1 V Respect to VSS on I/O pins 68
Input Voltage on I/O pins (upper limit) 1 V rel. VCC Respect to VSS on I/O pins; printed as VCC+1.0V 68
VCC Current (latch-up) -100 100 mA Latch-up characteristics 68
VCC(min) To /CS Low tVSL 1 ms 68
Write Inhibit Threshold Voltage VWI 1.9 2.3 V 68
Input Leakage Current ILI -2 2 µA T=-4085°C, VCC=2.73.6V 69
Output Leakage Current ILO -2 2 µA T=-4085°C, VCC=2.73.6V 69
Standby Current ICC1 14 25 µA T=-4085°C, VCC=2.73.6V; /CS=VCC, VIN=VCC or VSS 69
Deep Power-Down Current ICC2 0.6 2 µA T=-4085°C, VCC=2.73.6V; /CS=VCC, VIN=VCC or VSS 69
Operating Current (Read) ICC3 8 15 mA T=-4085°C, VCC=2.73.6V; SCLK=0.1VCC/0.9VCC, at 120MHz, Q=Open 69
Operating Current (Read) ICC3 6 10 mA T=-4085°C, VCC=2.73.6V; SCLK=0.1VCC/0.9VCC, at 80MHz, Q=Open 69
Operating Current (Page Program) ICC4 8 mA T=-4085°C, VCC=2.73.6V; /CS=VCC 69
Operating Current (WRSR) ICC5 8 mA T=-4085°C, VCC=2.73.6V; /CS=VCC 69
Operating Current (Sector Erase) ICC6 10 mA T=-4085°C, VCC=2.73.6V; /CS=VCC 69
Operating Current (Block Erase) ICC7 10 mA T=-4085°C, VCC=2.73.6V; /CS=VCC 69
Operating Current (Chip Erase) ICC8 10 mA T=-4085°C, VCC=2.73.6V; /CS=VCC 69
Input Low Voltage (lower limit) VIL -0.5 V T=-4085°C, VCC=2.73.6V 69
Input Low Voltage (upper limit) VIL 0.2 VCC T=-4085°C, VCC=2.73.6V; printed as 0.2VCC 69
Input High Voltage (lower limit) VIH 0.8 VCC T=-4085°C, VCC=2.73.6V; printed as 0.8VCC 69
Input High Voltage (upper limit) VIH 0.4 V rel. VCC T=-4085°C, VCC=2.73.6V; printed as VCC+0.4V 69
Output Low Voltage VOL 0.4 V IOL=100µA 69
Output High Voltage VOH -0.2 V rel. VCC IOH=-100µA; printed as VCC-0.2V 69
Clock frequency (3.0-3.6V supply) Fc 120 MHz 3.0-3.6V supply; all instructions except Read Data (03H) 70
Clock frequency (2.7-2.9V supply) Fc 108 MHz 2.7-2.9V supply; all instructions except Read Data (03H) 70
Clock frequency (Read Data) fR 100 MHz Read Data instruction (03H) 70
Serial Clock High Time tCLH 4.5 ns 70
Serial Clock Low Time tCLL 4.5 ns 70
Serial Clock Rise Time (Slew Rate) tCLCH 0.1 V/ns Tested with clock frequency lower than 50 MHz (note 1) 70
Serial Clock Fall Time (Slew Rate) tCHCL 0.1 V/ns Tested with clock frequency lower than 50 MHz (note 1) 70
/CS Active Setup Time tSLCH 5 ns 70
/CS Active Hold Time tCHSH 5 ns 70
/CS Not Active Setup Time tSHCH 5 ns 70
/CS Not Active Hold Time tCHSL 5 ns 70
/CS High Time (read/write) tSHSL 20 ns read/write 71
Output Disable Time tSHQZ 6 ns 71
Data In Setup Time tDVCH 3 ns 71
Data In Hold Time tCHDX 2 ns 71
/Hold Low Setup Time (relative to Clock) tHLCH 5 ns 71
/Hold High Hold Time (relative to Clock) tCHHL 5 ns 71
/Hold Low To High-Z Output tHLQZ 6 ns 71
Clock Low To Output Valid tCLQV 7.5 ns Note 3: 9.5 ns for 9Fh/90h read ID and read SR 71
Write Protect Setup Time Before /CS Low tWHSL 20 ns 71
/CS High To Deep Power-Down Mode tDP 20 µs 71
/CS High To Standby Mode Without Electronic Signature Read tRES1 35 µs 71
/CS High To Standby Mode With Electronic Signature Read tRES2 35 µs 71
Write Status Register Cycle Time tW 5 30 ms 71
Page Programming Time tPP 0.6 2.4 ms 71
Sector Erase Time tSE 35 300 ms 71
Block Erase Time (32K Bytes) tBE 0.12 1.6 S 32K Bytes block 71
Block Erase Time (64K Bytes) tBE 0.25 2 S 64K Bytes block 71
Chip Erase Time tCE 70 150 S 71

CAD (KiCad official)

  • Symbol: BY25Q128ESSIG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-208mil (KiCad packages3D, STEP)
  • 3D model files: by25q128essig-etched.step / by25q128essig-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); by25q128essig.step / by25q128essig.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: BOYAMICRO datasheet (78 pp, sha256 3271bb5b94d23f85, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF