ISO6721BDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VCC1	power_in	Side-1 (input side of channel A / output side of channel B) power supply. Operating range 1.71-1.89 V or 2.25-5.5 V referenced to GND1. Bypass locally with a low-ESR ceramic capacitor to GND1.
2	OUTA	output	Side-1 isolated digital output of channel A (forward channel driven by INA on side 2). Push-pull CMOS output; IOH up to 4 mA (VCCO=5 V), IOL up to 4 mA. Defaults HIGH when input power/signal is lost.
3	INB	input	Side-1 digital input of channel B (forward direction on side 1). CMOS/LVCMOS compatible logic input; VIH ≥ 0.7×VCC1, VIL ≤ 0.3×VCC1. Drives OUTB across the isolation barrier.
4	GND1	power_in	Side-1 ground return for VCC1. Isolated from GND2 by the SiO2 capacitive barrier (3000 VRMS, UL 1577).
5	GND2	power_in	Side-2 ground return for VCC2. Isolated from GND1 by the SiO2 capacitive barrier (3000 VRMS, UL 1577).
6	OUTB	output	Side-2 isolated digital output of channel B (driven by INB on side 1). Push-pull CMOS output; IOH up to 4 mA (VCCO=5 V), IOL up to 4 mA. Defaults HIGH when input power/signal is lost.
7	INA	input	Side-2 digital input of channel A (reverse direction relative to channel B). CMOS/LVCMOS compatible logic input; VIH ≥ 0.7×VCC2, VIL ≤ 0.3×VCC2. Drives OUTA across the isolation barrier.
8	VCC2	power_in	Side-2 (input side of channel A / output side of channel B) power supply. Operating range 1.71-1.89 V or 2.25-5.5 V referenced to GND2. VCC1 and VCC2 can be set independently. Bypass locally with a low-ESR ceramic capacitor to GND2.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Comm/UART
Pins	8

Ordering variants

Same part, different packaging or reel option.

ISO6721BDR
ISO6721BDRD

CAD (KiCad official)

Symbol: ISO6721BDR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`iso6721bdr.step`	122 KB	You want the bare part, or you mark your own boards.
`iso6721bdr-etched.step`	2.2 MB	You want the part with `ISO6721BDR` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 531 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (50 pp, sha256 7c2da9379961a24d, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF