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Contents

README

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TP74LV1T86C5

TECH PUBLIC · Logic Gates · SOT-353

TP74LV1T86C5 from TECH PUBLIC, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 2-input EXCLUSIVE-OR gate; accepts up to 5.5 V (recommended VI 0 to 5.5 V) regardless of VCC.
2 B input Data input B of the 2-input EXCLUSIVE-OR gate; accepts up to 5.5 V (recommended VI 0 to 5.5 V) regardless of VCC.
3 GND power_in Ground (0 V) reference for the device.
4 Y output Gate output Y = A XOR B, driving ±25 mA with output swing 0 V to VCC.
5 VCC power_in Supply voltage, recommended 1.6 V to 5.5 V (typ. 5.0 V), absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-353
Category Logic
Pins 5

CAD (KiCad official)

  • Symbol: TP74LV1T86C5
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: tp74lv1t86c5-etched.step / tp74lv1t86c5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp74lv1t86c5.step / tp74lv1t86c5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (9 pp, sha256 4a18a2f105d8040d, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF