component
TPS76625D
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS76625D
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8
TPS76625D from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC/FB | passive | Fixed version: not internally connected, so leave open or tie to ground for improved thermal performance (adjustable version uses this pin as FB and must not float). |
| 2 | PG | output | Power-good output is open-drain and requires a pullup resistor; if power-good is not used, ground this pin or leave it floating. |
| 3 | GND | power_in | Ground pin; the input and output capacitor ground returns should be placed as close to this pin as possible. |
| 4 | EN | input | Enable pin: driving it low enables the device and driving it high disables it, with low and high thresholds given in the Electrical Characteristics table. |
| 5 | IN | power_in | Input pin; use the recommended input capacitor value from Recommended Operating Conditions and place the capacitor as close to the IN and GND pins as possible. |
| 6 | IN | power_in | Input pin (second IN pin, bonded in parallel with pin 5); use the recommended input capacitor value from Recommended Operating Conditions and place the capacitor as close to the IN and GND pins as possible. |
| 7 | OUT | power_out | Output pin; use the recommended output capacitor value from Recommended Operating Conditions and place the capacitor as close to the OUT and GND pins as possible. |
| 8 | OUT | power_out | Output pin (second OUT pin, bonded in parallel with pin 7); use the recommended output capacitor value from Recommended Operating Conditions and place the capacitor as close to the OUT and GND pins as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS76625D - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps76625d-etched.step/tps76625d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps76625d.step/tps76625d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
43cfa370a86e4a2d, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).