component
ISOUSB111DWR
Public Made by Adomby adom
Texas I Others, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownISOUSB111DWR
Texas I · Others · SOIC-16-300mil
ISOUSB111DWR from Texas I, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS1 | power_in | Side 1 supply input: connect a 4.25 V to 5.5 V supply (e.g. USB VBUS) so the internal LDO generates V3P3V1, otherwise tie VBUS1 and V3P3V1 to an external 3.3 V supply. |
| 2 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 3 | V3P3V1 | power_in | Side 1 3.3 V supply: with 4.25 V to 5.5 V on VBUS1 connect a bypass capacitor to GND1 (internal LDO output), otherwise tie to VBUS1 and an external 3.3 V supply. |
| 4 | NC | unconnected | No connect; preferably leave floating or connect to V3P3V1, connecting to GND1 is also acceptable. |
| 5 | NC | unconnected | No connect; preferably leave floating or connect to V3P3V1, connecting to GND1 is also acceptable. |
| 6 | UD- | bidirectional | Upstream facing port D- (USB data line). |
| 7 | UD+ | bidirectional | Upstream facing port D+ (USB data line). |
| 8 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 9 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 10 | DD+ | bidirectional | Downstream facing port D+ (USB data line). |
| 11 | DD- | bidirectional | Downstream facing port D- (USB data line). |
| 12 | PIN | input | Upstream pull-up enable; if this pin is low, pull-up on DD+ and DD- is not recognized. |
| 13 | NC | unconnected | No connect; preferably leave floating or connect to V3P3V2, connecting to GND2 is also acceptable. |
| 14 | V3P3V2 | power_in | Side 2 3.3 V supply: with 4.25 V to 5.5 V on VBUS2 connect a bypass capacitor (internal LDO output), otherwise tie to VBUS2 and an external 3.3 V supply. |
| 15 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 16 | VBUS2 | power_in | Side 2 supply input: connect a 4.25 V to 5.5 V supply (e.g. USB VBUS) so the internal LDO generates V3P3V2, otherwise tie VBUS2 and V3P3V2 to an external 3.3 V supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas I |
| Package | SOIC-16-300mil |
| Category | Others |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VBUS supply voltage | VBUS1, VBUS2 | -0.3 | 6 | V | 5 | ||
| 3.3-V input supply voltage | V3P3V1, V3P3V2 | -0.3 | 4.25 | V | 5 | ||
| Voltage on bus pins | VDPDM | -0.3 | 6 | V | UD+, UD-, DD+, DD-; 1000 total short events and cumulative duration of 1000 hrs | 5 | |
| Output current on output pins | IO | -10 | 10 | mA | V*OK | 5 | |
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TSTG | -65 | 150 | °C | 5 | ||
| ESD HBM, DW package | V(ESD) | -2000 | 2000 | V | ANSI/ESDA/JEDEC JS-001, all pins | 5 | |
| ESD CDM | V(ESD) | -500 | 500 | V | JESD22-C101, all pins | 5 | |
| VBUS input voltage | VBUSx | 4.25 | 5 | 5.5 | V | inclusive of any ripple | 5 |
| 3.3-V input supply voltage | V3P3Vx | 3 | 3.3 | 3.6 | V | inclusive of any ripple | 5 |
| Operating free-air temperature | TA | -40 | 125 | °C | 5 | ||
| Junction temperature | TJ | -55 | 150 | °C | 5 | ||
| Junction-to-ambient thermal resistance | RΘJA | 53.4 | °C/W | DW (SOIC) 16 pins | 6 | ||
| Junction-to-case (top) thermal resistance | RΘJC(top) | 19.6 | °C/W | DW (SOIC) | 6 | ||
| Junction-to-board thermal resistance | RΘJB | 22.3 | °C/W | DW (SOIC) | 6 | ||
| Junction-to-top characterization parameter | ψJT | 2.4 | °C/W | DW (SOIC) | 6 | ||
| Junction-to-board characterization parameter | ψJB | 21.6 | °C/W | DW (SOIC) | 6 | ||
| Supply current, receive side FS active | IVBUSx or IV3P3Vx | 12 | 15.3 | mA | 6 MHz signal rate, CL = 50 pF | 9 | |
| Supply current, transmit side FS active | IVBUSx or IV3P3Vx | 9.5 | 13 | mA | 6 MHz signal rate, CL = 50 pF | 9 | |
| Supply current, receive side LS active | IVBUSx or IV3P3Vx | 11 | 13.5 | mA | 750 kHz signal rate, CL = 450 pF | 9 | |
| Supply current, transmit side LS active | IVBUSx or IV3P3Vx | 9.5 | 13 | mA | 750 kHz signal rate, CL = 450 pF | 9 | |
| Supply current, FS/LS idle | IVBUSx or IV3P3Vx | 7.4 | 11 | mA | US side or DS side | 9 | |
| Supply current, L1 sleep, upstream side | IVBUSx or IV3P3Vx | 7.5 | 9.8 | mA | Upstream Facing side | 9 | |
| Supply current, L1 sleep, downstream side | IVBUSx or IV3P3Vx | 7.3 | 9.5 | mA | Downstream Facing side | 9 | |
| Supply current, L2 suspend, upstream side | IVBUSx or IV3P3Vx | 1.07 | 1.55 | mA | Upstream Facing side | 9 | |
| Supply current, L2 suspend, downstream side | IVBUSx or IV3P3Vx | 5.6 | 7.5 | mA | Downstream Facing side | 9 | |
| Supply current, not attached, upstream side | IVBUSx or IV3P3Vx | 6.2 | 8.5 | mA | Upstream Facing side | 9 | |
| Supply current, not attached, downstream side | IVBUSx or IV3P3Vx | 6.2 | 8.9 | mA | Downstream Facing side | 9 | |
| Bus pull-up resistor upstream (idle) | RPUI | 0.9 | 1.1 | 1.575 | kΩ | USB 2.0 Spec Section 7.1.5 | 9 |
| Bus pull-up resistor upstream (receiving) | RPUR | 1.5 | 2.2 | 3 | kΩ | USB 2.0 Spec Section 7.1.5 | 10 |
| Bus pull-down resistor downstream | RPD | 14.25 | 19 | 24.8 | kΩ | USB 2.0 Spec Section 7.1.5 | 10 |
| Termination voltage for upstream pullup | VTERM | 3 | 3.6 | V | USB 2.0 Spec Section 7.1.5, pull up enabled, external load disconnected | 10 | |
| High (floating) input level | VIHZ | 2.7 | 3.6 | V | USB 2.0 Spec Section 7.1.4 | 10 | |
| Common mode range | VCM | 0.8 | 2.5 | V | Includes VDI range; measured at connector | 10 | |
| Output low level | VOL | 0 | 0.3 | V | RL of 0.9 kΩ to 3.6 V | 10 | |
| Output high level (driven) | VOH | 2.8 | 3.6 | V | RL of 14.25 kΩ to GND | 10 | |
| Driver series output resistance | ZFSTERM | 28 | 44 | Ω | USB 2.0 Spec Section 7.1.1 and Figure 7-4 | 10 | |
| Output signal crossover voltage | VCRS | 1.3 | 2 | V | Excluding the first transition from the Idle state | 10 | |
| Thermal shutdown turn-on temperature | TSD+ | 160 | 170 | 180 | °C | 10 | |
| Thermal shutdown turn-off temperature | TSD- | 150 | 160 | 170 | °C | 10 | |
| Power supply ramp-up time | TSUPRAMP | 0.005 | 100 | ms | VBUSx and V3P3Vx external supplies | 11 | |
| Power-up time | TPWRUP | 3.6 | 8 | ms | All external supplies ramped up together with 5 µs power up time | 11 | |
| FS rise time | TFR | 4 | 20 | ns | CL = 50 pF | 11 | |
| FS fall time | TFF | 4 | 20 | ns | CL = 50 pF | 11 | |
| FS rise and fall time matching | TFRFM | 90 | 111.1 | % | CL = 50 pF, excluding first transition from Idle | 11 | |
| LS rise time | TLR | 75 | 300 | ns | CL range 50 pF to 600 pF | 11 | |
| LS fall time | TLF | 75 | 300 | ns | CL range 50 pF to 600 pF | 11 | |
| LS rise and fall time matching | TLRFM | 80 | 125 | % | CL range 50 pF to 600 pF | 11 | |
| Connect detection debounce filter | TFILTCONN | 45 | 70 | 80 | µs | 11 | |
| Common mode transient immunity | CMTI | 75 | 100 | kV/µs | VCMPKPK = 1200 V during USB data transmission | 11 | |
| LS data bit-width distortion after SOP | TLSOP | -40 | 25 | ns | USB 2.0 spec section 7.1.14 | 12 | |
| LS repeater additive jitter, paired transition | TLSJP | -5 | 5 | ns | USB 2.0 spec section 7.1.14 | 12 | |
| FS data bit-width distortion after SOP | TFSOP | -10 | 10 | ns | USB 2.0 spec section 7.1.14 | 12 | |
| FS repeater additive jitter, paired transition | TFSJP | -2 | 2 | ns | USB 2.0 spec section 7.1.14 | 12 |
CAD (KiCad official)
- Symbol:
ISOUSB111DWR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
isousb111dwr-etched.step/isousb111dwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);isousb111dwr.step/isousb111dwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas I datasheet (38 pp, sha256
edd2f224403b0078, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).