LMV934Q1MTX from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT A	output	Output of channel A.
2	-IN A	input	Inverting input of channel A.
3	+IN A	input	Noninverting input of channel A; the input common-mode voltage extends 200 mV beyond the supply rails.
4	V+	power_in	Positive (highest) power supply; the device operates from 1.8 V to 5.5 V (V+ minus V-) per the Recommended Operating Ratings.
5	+IN B	input	Noninverting input of channel B; the input common-mode voltage extends 200 mV beyond the supply rails.
6	-IN B	input	Inverting input of channel B.
7	OUT B	output	Output of channel B.
8	OUT C	output	Output of channel C.
9	-IN C	input	Inverting input of channel C.
10	+IN C	input	Noninverting input of channel C; the input common-mode voltage extends 200 mV beyond the supply rails.
11	V-	power_in	Negative (lowest) power supply; the device operates from 1.8 V to 5.5 V (V+ minus V-) per the Recommended Operating Ratings.
12	+IN D	input	Noninverting input of channel D; the input common-mode voltage extends 200 mV beyond the supply rails.
13	-IN D	input	Inverting input of channel D.
14	OUT D	output	Output of channel D.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-14
Category	Operational Amplifier/Comparator
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage (V+, V−)		-0.3		6	V		4
Junction temperature		-40		150	°C		4
Storage temperature	Tstg	-65		150	°C		4
Supply voltage (V+, V−)		1.8		5.5	V		4
Ambient temperature		-40		125	°C		4
Input offset voltage (quad)	VOS		1	5.5	mV	25°C; V+=1.8 V, VCM=V+/2, VO=V+/2	5
Input offset voltage (quad), full range	VOS			7.5	mV	Full Range; V+=1.8 V	5
Input bias current	IB		15	35	nA	25°C; V+=1.8 V	5
Input bias current, full range	IB			50	nA	Full Range; V+=1.8 V	5
Input offset current	IOS		13	25	nA	25°C; V+=1.8 V	5
Input offset current, full range	IOS			40	nA	Full Range; V+=1.8 V	5
Supply current per channel	IS		103	185	μA	25°C; V+=1.8 V	5
Supply current per channel, full range	IS			205	μA	Full Range; V+=1.8 V	5
Common-mode rejection ratio	CMRR	55	76		dB	25°C; 0 ≤ VCM ≤ 0.6 V, 1.4 V ≤ VCM ≤ 1.8 V	5
Common-mode rejection ratio, full range	CMRR	50			dB	Full Range; 0 ≤ VCM ≤ 0.6 V, 1.4 V ≤ VCM ≤ 1.8 V	5
Power supply rejection ratio	PSRR	75	100		dB	25°C; 1.8 V ≤ V+ ≤ 5 V	5
Power supply rejection ratio, full range	PSRR	70			dB	Full Range; 1.8 V ≤ V+ ≤ 5 V	5
Large-signal voltage gain, RL = 600 Ω	AV	75	90		dB	25°C; RL = 600 Ω to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V	5
Large-signal voltage gain, RL = 600 Ω, full range	AV	72			dB	Full Range; RL = 600 Ω to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V	5
Output swing, high rail, RL = 600 Ω	VO	1.65	1.72		V	25°C; RL = 600 Ω to 0.9 V, VIN = ±100 mV	5
Output swing, low rail, RL = 600 Ω	VO		0.077	0.105	V	25°C; RL = 600 Ω to 0.9 V, VIN = ±100 mV	5
Output short-circuit current, sourcing	IO	4	8		mA	25°C; sourcing, VO = 0 V, VIN = 100 mV	6
Output short-circuit current, sinking	IO	7	9		mA	25°C; sinking, VO = 1.8 V, VIN = −100 mV	6
Input offset voltage (quad)	VOS		1	5.5	mV	25°C; V+=2.7 V, VCM=V+/2, VO=V+/2	6
Input offset voltage (quad), full range	VOS			7.5	mV	Full Range; V+=2.7 V	6
Input bias current	IB		15	35	nA	25°C; V+=2.7 V	6
Input bias current, full range	IB			50	nA	Full Range; V+=2.7 V	6
Input offset current	IOS		8	25	nA	25°C; V+=2.7 V	6
Input offset current, full range	IOS			40	nA	Full Range; V+=2.7 V	6
Supply current per channel	IS		105	190	μA	25°C; V+=2.7 V	6
Supply current per channel, full range	IS			210	μA	Full Range; V+=2.7 V	6
Common-mode rejection ratio	CMRR	55	80		dB	25°C; 0 ≤ VCM ≤ 1.5 V, 2.3 V ≤ VCM ≤ 2.7 V	7
Common-mode rejection ratio, full range	CMRR	50			dB	Full Range; 0 ≤ VCM ≤ 1.5 V, 2.3 V ≤ VCM ≤ 2.7 V	7
Power supply rejection ratio	PSRR	75	100		dB	25°C; 1.8 V ≤ V+ ≤ 5 V, VCM = 0.5 V	7
Power supply rejection ratio, full range	PSRR	70			dB	Full Range; 1.8 V ≤ V+ ≤ 5 V, VCM = 0.5 V	7
Large-signal voltage gain, RL = 600 Ω	AV	78	90		dB	25°C; RL = 600 Ω to 1.35 V, VO = 0.2 V to 2.5 V	7
Large-signal voltage gain, RL = 600 Ω, full range	AV	75			dB	Full Range; RL = 600 Ω to 1.35 V, VO = 0.2 V to 2.5 V	7
Output swing, high rail, RL = 600 Ω	VO	2.55	2.62		V	25°C; RL = 600 Ω to 1.35 V, VIN = ±100 mV	7
Output swing, low rail, RL = 600 Ω	VO		0.083	0.11	V	25°C; RL = 600 Ω to 1.35 V, VIN = ±100 mV	7
Output short-circuit current, sourcing	IO	20	30		mA	25°C; sourcing, VO = 0 V, VIN = +100 mV	7
Output short-circuit current, sinking	IO	18	25		mA	25°C; sinking, VO = 2.7 V, VIN = −100 mV	7
Input offset voltage (quad)	VOS		1	5.5	mV	25°C; V+=5 V, VCM=V+/2, VO=V+/2	9
Input offset voltage (quad), full range	VOS			7.5	mV	Full Range; V+=5 V	9
Input bias current	IB		14	35	nA	25°C; V+=5 V	9
Input bias current, full range	IB			50	nA	Full Range; V+=5 V	9
Input offset current	IOS		9	25	nA	25°C; V+=5 V	9
Input offset current, full range	IOS			40	nA	Full Range; V+=5 V	9
Supply current per channel	IS		116	210	μA	25°C; V+=5 V	9
Supply current per channel, full range	IS			230	μA	Full Range; V+=5 V	9
Common-mode rejection ratio	CMRR	60	86		dB	25°C; 0 ≤ VCM ≤ 3.8 V, 4.6 V ≤ VCM ≤ 5.0 V	9
Common-mode rejection ratio, full range	CMRR	55			dB	Full Range; 0 ≤ VCM ≤ 3.8 V, 4.6 V ≤ VCM ≤ 5.0 V	9
Power supply rejection ratio	PSRR	75	100		dB	25°C; 1.8 V ≤ V+ ≤ 5 V, VCM = 0.5 V	9
Power supply rejection ratio, full range	PSRR	70			dB	Full Range; 1.8 V ≤ V+ ≤ 5 V, VCM = 0.5 V	9
Large-signal voltage gain, RL = 600 Ω	AV	81	90		dB	25°C; RL = 600 Ω to 2.5 V, VO = 0.2 V to 4.8 V	9
Large-signal voltage gain, RL = 600 Ω, full range	AV	78			dB	Full Range; RL = 600 Ω to 2.5 V, VO = 0.2 V to 4.8 V	9
Output swing, high rail, RL = 600 Ω	VO	4.855	4.89		V	25°C; RL = 600 Ω to 2.5 V, VIN = ±100 mV	9
Output swing, low rail, RL = 600 Ω	VO		0.12	0.16	V	25°C; RL = 600 Ω to 2.5 V, VIN = ±100 mV	9
Thermal resistance, junction-to-ambient (PW, 14-pin TSSOP)	RθJA		124.8		°C/W	PW (TSSOP) 14-pin package	4
Thermal resistance, junction-to-case (top) (PW, 14-pin TSSOP)	RθJC(top)		51.4		°C/W	PW (TSSOP) 14-pin package	4
Thermal resistance, junction-to-board (PW, 14-pin TSSOP)	RθJB		67.2		°C/W	PW (TSSOP) 14-pin package	4

CAD (KiCad official)

Symbol: LMV934Q1MTX
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: lmv934q1mtx-etched.step / lmv934q1mtx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmv934q1mtx.step / lmv934q1mtx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (44 pp, sha256 b1e84da94c3f0e4a, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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LMV934Q1MTX

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