component
STM32F446RCT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F446RCT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32F446RCT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Battery supply pin (1.7 to 3.6 V) for RTC, backup SRAM, backup registers, and low-power modes. |
| 2 | PC13 | bidirectional | GPIO port C bit 13, 5 V tolerant I/O with reset as floating input; supports RTC tamper input and wakeup. |
| 3 | PC14-OSC32_IN | bidirectional | GPIO port C bit 14 (function after reset: 32 kHz oscillator input); 5 V tolerant I/O. |
| 4 | PC15-OSC32_OUT | bidirectional | GPIO port C bit 15 (function after reset: 32 kHz oscillator output); 5 V tolerant I/O. |
| 5 | PH0-OSC_IN | bidirectional | GPIO port H bit 0 (function after reset: external oscillator input, 4-26 MHz); 5 V tolerant I/O. |
| 6 | PH1-OSC_OUT | bidirectional | GPIO port H bit 1 (function after reset: external oscillator output); 5 V tolerant I/O. |
| 7 | NRST | bidirectional | Bidirectional reset pin with weak pull-up resistor; accepts active-low reset signals and open-drain output. |
| 8 | PC0 | bidirectional | GPIO port C bit 0, 5 V tolerant I/O with reset as floating input; supports SAI1_MCLK_B, OTG_HS_ULPI_STP, FMC_SDNWE, ADC123_IN10. |
| 9 | PC1 | bidirectional | GPIO port C bit 1, 5 V tolerant I/O with reset as floating input; supports SPI/I2S/SAI functions and ADC123_IN11. |
| 10 | PC2 | bidirectional | GPIO port C bit 2, 5 V tolerant I/O with reset as floating input; supports SPI2_MISO, OTG_HS_ULPI_DIR, FMC_SDNE0, ADC123_IN12. |
| 11 | PC3 | bidirectional | GPIO port C bit 3, 5 V tolerant I/O with reset as floating input; supports SPI/I2S functions, OTG_HS_ULPI_NXT, FMC_SDCKE0, ADC123_IN13. |
| 12 | VSSA | power_in | Analog ground supply pin (0 V reference) for ADC, DAC, and PLL circuits. |
| 13 | VDDA | power_in | Analog power supply pin (1.8 to 3.6 V) for analog blocks including ADC, DAC, comparators, and operational amplifiers. |
| 14 | PA0-WKUP | bidirectional | GPIO port A bit 0 (function after reset: wakeup pin), 5 V tolerant I/O; supports TIM2/TIM5/TIM8, USART2, UART4, ADC123_IN0, wakeup/tamper. |
| 15 | PA1 | bidirectional | GPIO port A bit 1, 5 V tolerant I/O with reset as floating input; supports TIM2/TIM5, USART2/UART4, QUADSPI, SAI2, ADC123_IN1. |
| 16 | PA2 | bidirectional | GPIO port A bit 2, 5 V tolerant I/O with reset as floating input; supports TIM2/TIM5/TIM9, USART2, SAI2, ADC123_IN2. |
| 17 | PA3 | bidirectional | GPIO port A bit 3, 5 V tolerant I/O with reset as floating input; supports TIM2/TIM5/TIM9, SAI1, USART2, OTG_HS_ULPI_D0, ADC123_IN3. |
| 18 | VSS | power_in | Digital ground supply pin (0 V reference). |
| 19 | VDD | power_in | Digital power supply pin (1.7 to 3.6 V) for core logic. |
| 20 | PA4 | bidirectional | GPIO port A bit 4, 3.3 V tolerant I/O directly connected to ADC with reset as floating input; supports SPI/I2S/SAI, USART2, OTG_HS_SOF, DCMI_HSYNC, ADC12_IN4, DAC_OUT1. |
| 21 | PA5 | bidirectional | GPIO port A bit 5, 3.3 V tolerant I/O directly connected to ADC with reset as floating input; supports TIM2/TIM8, SPI1, OTG_HS_ULPI_CK, ADC12_IN5, DAC_OUT2. |
| 22 | PA6 | bidirectional | GPIO port A bit 6, 5 V tolerant I/O with reset as floating input; supports TIM1/TIM3/TIM8/TIM13, SPI1, I2S2_MCK, DCMI_PIXCLK, ADC12_IN6. |
| 23 | PA7 | bidirectional | GPIO port A bit 7, 5 V tolerant I/O with reset as floating input; supports TIM1/TIM3/TIM8/TIM14, SPI1/I2S1, FMC_SDNWE, ADC12_IN7. |
| 24 | PC4 | bidirectional | GPIO port C bit 4, 5 V tolerant I/O with reset as floating input; supports I2S1_MCK, SPDIFRX_IN2, FMC_SDNE0, ADC12_IN14. |
| 25 | PC5 | bidirectional | GPIO port C bit 5, 5 V tolerant I/O with reset as floating input; supports USART3_RX, SPDIFRX_IN3, FMC_SDCKE0, ADC12_IN15. |
| 26 | PB0 | bidirectional | GPIO port B bit 0, 5 V tolerant I/O with reset as floating input; supports TIM1/TIM3/TIM8, SPI3/I2S3, UART4, OTG_HS_ULPI_D1, SDIO_D1, ADC12_IN8. |
| 27 | PB1 | bidirectional | GPIO port B bit 1, 5 V tolerant I/O with reset as floating input; supports TIM1/TIM3/TIM8, OTG_HS_ULPI_D2, SDIO_D2, ADC12_IN9. |
| 28 | PB2-BOOT1 | bidirectional | GPIO port B bit 2 (function after reset: BOOT1 pin), 5 V tolerant I/O; supports TIM2, SAI1, SPI3/I2S3, QUADSPI_CLK, OTG_HS_ULPI_D4, SDIO_CK. |
| 29 | PB10 | bidirectional | GPIO port B bit 10, 5 V tolerant I/O with reset as floating input; supports TIM2, I2C2, SPI2/I2S2, SAI1, USART3, OTG_HS_ULPI_D3. |
| 30 | VCAP_1 | passive | Decoupling capacitor connection point for internal voltage regulator; requires 1 µF to 10 µF ceramic capacitor. |
| 31 | VSS | power_in | Digital ground supply pin (0 V reference). |
| 32 | VDD | power_in | Digital power supply pin (1.7 to 3.6 V) for core logic. |
| 33 | PB12 | bidirectional | GPIO port B bit 12, 5 V tolerant I/O with reset as floating input; supports TIM1, I2C2, SPI2/I2S2, SAI1, USART3, CAN2, OTG_HS_ULPI_D5, OTG_HS_ID. |
| 34 | PB13 | bidirectional | GPIO port B bit 13, 5 V tolerant I/O with reset as floating input; supports TIM1, SPI2/I2S2, USART3, CAN2, OTG_HS_ULPI_D6, OTG_HS_VBUS. |
| 35 | PB14 | bidirectional | GPIO port B bit 14, 5 V tolerant I/O supplied by VDDUSB with reset as floating input; supports TIM1/TIM8, SPI2, USART3, TIM12, OTG_HS_DM. |
| 36 | PB15 | bidirectional | GPIO port B bit 15, 5 V tolerant I/O supplied by VDDUSB with reset as floating input; supports RTC_REFIN, TIM1/TIM8, SPI2/I2S2, TIM12, OTG_HS_DP. |
| 37 | PC6 | bidirectional | GPIO port C bit 6, I2C fast-mode+ compatible 5 V tolerant I/O with reset as floating input; supports TIM3/TIM8, FMPI2C1, I2S2, USART6, SDIO_D6, DCMI_D0. |
| 38 | PC7 | bidirectional | GPIO port C bit 7, I2C fast-mode+ compatible 5 V tolerant I/O with reset as floating input; supports TIM3/TIM8, FMPI2C1, SPI2/I2S2/I2S3, SPDIFRX, USART6, SDIO_D7, DCMI_D1. |
| 39 | PC8 | bidirectional | GPIO port C bit 8, 5 V tolerant I/O with reset as floating input; supports TRACED0, TIM3/TIM8, UART5, USART6, SDIO_D0, DCMI_D2. |
| 40 | PC9 | bidirectional | GPIO port C bit 9, 5 V tolerant I/O with reset as floating input; supports MCO2, TIM3/TIM8, I2C3, I2S_CKIN, UART5, QUADSPI, SDIO_D1, DCMI_D3. |
| 41 | PA8 | bidirectional | GPIO port A bit 8, 5 V tolerant I/O with reset as floating input; supports MCO1, TIM1, I2C3, USART1, OTG_FS_SOF. |
| 42 | PA9 | bidirectional | GPIO port A bit 9, 5 V tolerant I/O with reset as floating input; supports TIM1, I2C3, SPI2/I2S2, SAI1, USART1, DCMI_D0, OTG_FS_VBUS. |
| 43 | PA10 | bidirectional | GPIO port A bit 10, 5 V tolerant I/O with reset as floating input; supports TIM1, USART1, OTG_FS_ID, DCMI_D1. |
| 44 | PA11 | bidirectional | GPIO port A bit 11, 5 V tolerant I/O supplied by VDDUSB with reset as floating input; supports TIM1, USART1, CAN1, OTG_FS_DM. |
| 45 | PA12 | bidirectional | GPIO port A bit 12, 5 V tolerant I/O supplied by VDDUSB with reset as floating input; supports TIM1, USART1, SAI2, CAN1, OTG_FS_DP. |
| 46 | PA13 | bidirectional | GPIO port A bit 13 (function after reset: JTMS-SWDIO), 5 V tolerant I/O; debug interface pin for JTAG/SWD. |
| 47 | VSS | power_in | Digital ground supply pin (0 V reference). |
| 48 | VDD | power_in | Digital power supply pin (1.7 to 3.6 V) for core logic. |
| 49 | PA14 | bidirectional | GPIO port A bit 14 (function after reset: JTCK-SWCLK), 5 V tolerant I/O; debug interface clock pin for JTAG/SWD. |
| 50 | PA15 | bidirectional | GPIO port A bit 15 (function after reset: JTDI), 5 V tolerant I/O; supports JTDI, TIM2, HDMI_CEC, SPI1/SPI3, I2S1/I2S3, UART4. |
| 51 | PC10 | bidirectional | GPIO port C bit 10, 5 V tolerant I/O with reset as floating input; supports SPI3/I2S3, USART3, UART4, QUADSPI, SDIO_D2, DCMI_D8. |
| 52 | PC11 | bidirectional | GPIO port C bit 11, 5 V tolerant I/O with reset as floating input; supports SPI3, USART3, UART4, QUADSPI, SDIO_D3, DCMI_D4. |
| 53 | PC12 | bidirectional | GPIO port C bit 12, 5 V tolerant I/O with reset as floating input; supports I2C2, SPI3/I2S3, USART3, UART5, SDIO_CK, DCMI_D9. |
| 54 | PD2 | bidirectional | GPIO port D bit 2, 5 V tolerant I/O with reset as floating input; supports TIM3, UART5, SDIO_CMD, DCMI_D11. |
| 55 | PB3 | bidirectional | GPIO port B bit 3 (function after reset: JTDO/TRACESWO), 5 V tolerant I/O; supports JTDO/TRACESWO, TIM2, I2C2, SPI1/SPI3, I2S1/I2S3. |
| 56 | PB4 | bidirectional | GPIO port B bit 4 (function after reset: NJTRST), 5 V tolerant I/O; supports NJTRST, TIM3, I2C3, SPI1/SPI3, I2S1/I2S3, SPI2/I2S2. |
| 57 | PB5 | bidirectional | GPIO port B bit 5, 5 V tolerant I/O with reset as floating input; supports TIM3, I2C1, SPI1/SPI3, I2S1/I2S3, CAN2, OTG_HS_ULPI_D7, FMC_SDCKE1, DCMI_D10. |
| 58 | PB6 | bidirectional | GPIO port B bit 6, 5 V tolerant I/O with reset as floating input; supports TIM4, HDMI_CEC, I2C1, USART1, CAN2, QUADSPI, FMC_SDNE1, DCMI_D5. |
| 59 | PB7 | bidirectional | GPIO port B bit 7, 5 V tolerant I/O with reset as floating input; supports TIM4, I2C1, USART1, SPDIFRX, FMC_NL, DCMI_VSYNC. |
| 60 | BOOT0 | input | Dedicated BOOT0 input pin (VPP in programming mode); determines boot source selection (Flash, system memory, or SRAM). |
| 61 | PB8 | bidirectional | GPIO port B bit 8, 5 V tolerant I/O with reset as floating input; supports TIM2/TIM4/TIM10, I2C1, CAN1, SDIO_D4, DCMI_D6. |
| 62 | PB9 | bidirectional | GPIO port B bit 9, 5 V tolerant I/O with reset as floating input; supports TIM2/TIM4/TIM11, I2C1, SPI2/I2S2, SAI1, CAN1, SDIO_D5, DCMI_D7. |
| 63 | VSS | power_in | Digital ground supply pin (0 V reference). |
| 64 | VDD | power_in | Digital power supply pin (1.7 to 3.6 V) for core logic. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32F446RCT6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32f446rct6-etched.step/stm32f446rct6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f446rct6.step/stm32f446rct6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (198 pp, sha256
363b5edfe29c1c6a, retrieved 2026-09-26, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).