component
ADS1292IRSMT
Public Made by Adomby adom
Texas Instruments Analog Front End (AFE), VQFN-32-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownADS1292IRSMT
Texas Instruments · Analog Front End (AFE) · VQFN-32-EP(4x4)
ADS1292IRSMT from Texas Instruments, in a VQFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGA1N | output | PGA1 inverting output |
| 2 | PGA1P | output | PGA1 noninverting output |
| 3 | IN1N | input | Differential analog negative input 1 |
| 4 | IN1P | input | Differential analog positive input 1 |
| 5 | IN2N | input | Differential analog negative input 2 |
| 6 | IN2P | input | Differential analog positive input 2 |
| 7 | PGA2N | output | PGA2 inverting output |
| 8 | PGA2P | output | PGA2 noninverting output |
| 9 | VREFP | bidirectional | Positive reference voltage; internal 2.42 V or 4.033 V or external reference input |
| 10 | VREFN | input | Negative reference voltage; must be connected to AVSS |
| 11 | VCAP1 | passive | Analog bypass capacitor connection |
| 12 | AVDD | power_in | Analog power supply, 2.7 V to 5.25 V |
| 13 | AVSS | power_in | Analog ground |
| 14 | CLKSEL | input | Master clock select; 0 for external clock, 1 for internal |
| 15 | PWDN/RESET | input | Power-down or system reset; active low |
| 16 | START | input | Start conversion control signal |
| 17 | CLK | input | Master clock input, 512 kHz or 2.048 MHz |
| 18 | CS | input | Chip select; active low |
| 19 | DIN | input | SPI serial data input |
| 20 | SCLK | input | SPI serial clock |
| 21 | DOUT | output | SPI serial data output |
| 22 | DRDY | output | Data ready indicator; active low |
| 23 | DVDD | power_in | Digital power supply, 1.7 V to 3.6 V |
| 24 | DGND | power_in | Digital ground |
| 25 | GPIO2/RCLK2 | bidirectional | General-purpose I/O 2 or respiration clock 2 for ADS1292R |
| 26 | GPIO1/RCLK1 | bidirectional | General-purpose I/O 1 or respiration clock 1 for ADS1292R |
| 27 | VCAP2 | passive | Analog bypass capacitor connection |
| 28 | RLDINV | input | Right leg drive inverting input; connect to AVDD if not used |
| 29 | RLDIN/RLDREF | input | Right leg drive input to multiplexer or RLD amplifier noninverting input; connect to AVDD if not used |
| 30 | RLDOUT | output | Right leg drive output |
| 31 | RESP_MODP/IN3P | bidirectional | P-side respiration excitation signal output or auxiliary input 3P |
| 32 | RESP_MODN/IN3N | bidirectional | N-side respiration excitation signal output or auxiliary input 3N |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(4x4) |
| Category | Data Acquisition |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
ADS1292IRSMT - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: VQFN-32-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
ads1292irsmt-etched.step/ads1292irsmt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ads1292irsmt.step/ads1292irsmt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (83 pp, sha256
82b2aac52bf182df, retrieved 2026-09-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).