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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

ADS8513IDWR

Texas Instruments · Analog To Digital Converters (ADC) · SOIC-16-300mil

ADS8513IDWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	R1IN	input	Analog input whose connection to VIN, BUF, or GND selects the input range per Table 1 and Table 3.
2	GND	power_in	Ground pin.
3	R2IN	input	Analog input whose connection to VIN, BUF, or GND selects the input range per Table 1 and Table 3.
4	R3IN	input	Analog input whose connection to VIN, BUF, or GND selects the input range per Table 1 and Table 3.
5	BUF	output	Reference buffer output that connects to R1IN, R2IN, or R3IN as needed for the selected input range.
6	CAP	passive	Reference buffer compensation node, decoupled to ground with a 1-µF tantalum capacitor in parallel with a 0.01-µF ceramic capacitor.
7	REF	bidirectional	Outputs the internal 2.5-V reference through a series 4-kΩ resistor, decoupled with 1 µF to 2.2 µF tantalum to ground; an external reference applied here overrides the internal reference.
8	GND	power_in	Ground pin.
9	DATACLK	bidirectional	With EXT/INT low it is an output providing the serial data clock, 3-stated when CS is high; with EXT/INT high it is an input that requires an externally provided serial data clock.
10	DATA	output	Serial data output carrying the result of the last completed conversion, synchronized to DATACLK and 3-stated when CS is high.
11	EXT/INT	input	Selects the DATACLK source: high requires an external clock, low derives the clock from the internal conversion clock (the conversion clock is always internal).
12	CONV	input	A falling edge holds the sample/hold and starts a conversion regardless of CS, and is ignored if a conversion is already in progress.
13	CS	input	Chip select: high 3-states DATA, BUSY, and DATACLK (when EXT/INT is low), low enables all outputs; a falling edge on CONV still starts a conversion when CS is high.
14	BUSY	output	Goes low when a conversion starts and remains low throughout the conversion; 3-stated when CS is high.
15	PWRD	input	When high, most of the device circuitry is placed in a low-power mode that significantly reduces power consumption.
16	VS	power_in	+5-V supply input, decoupled to ground with a 0.1-µF ceramic capacitor in parallel with a 10-µF tantalum capacitor.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16-300mil
Category	Data Acquisition
Pins	16

CAD (KiCad official)

Symbol: ADS8513IDWR
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16-300mil (KiCad packages3D, STEP)
3D model files: ads8513idwr-etched.step / ads8513idwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ads8513idwr.step / ads8513idwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (38 pp, sha256 2b133af50234f381, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF