component
FM33LC045N
Public Made by Adomby adom
FUDAN MICRO Other Processors and Microcontrollers (MCUs), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownFM33LC045N
FUDAN MICRO · Other Processors and Microcontrollers (MCUs) · LQFP-48(7x7)
FM33LC045N from FUDAN MICRO, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA14 | bidirectional | GPIO with UART0_TX, LPUART0_TX and ADC_IN7 alternate functions. |
| 2 | PA15 | bidirectional | GPIO with WKUP0 external wake-up, SVS external supply detect and ADC_IN10. |
| 3 | PA0 | bidirectional | GPIO with LCD COM0 and UART4_RX. |
| 4 | PA1 | bidirectional | GPIO with LCD COM1 and UART4_TX. |
| 5 | PA2 | bidirectional | GPIO with LCD COM2, UART0_RX and LPUART0_RX. |
| 6 | PA3 | bidirectional | GPIO with LCD COM3, UART0_TX and LPUART0_TX. |
| 7 | PA4 | bidirectional | GPIO with LCD COM4/SEG28, GPT1_CH3 and COMP2_INN1 comparator input. |
| 8 | PA5 | bidirectional | GPIO with LCD COM5/SEG29, GPT1_CH4 and COMP2_INN2 comparator input. |
| 9 | PA6 | bidirectional | GPIO with LCD COM6/SEG30 and OPA1_INN2 op-amp input. |
| 10 | PA7 | bidirectional | GPIO with LCD COM7/SEG31 and OPA1_INP2 op-amp input. |
| 11 | PA8 | bidirectional | GPIO with LCD SEG0, LPT32_CH1 and COMP2_INP1 comparator input. |
| 12 | PA9 | bidirectional | GPIO with LCD SEG1, LPT32_CH2 and COMP2_INP2 comparator input. |
| 13 | PA10 | bidirectional | GPIO with WKUP1 wake-up, LCD SEG2, LPT32_ETR and COMP1_INN1 comparator input. |
| 14 | PB2 | bidirectional | GPIO with WKUP2 wake-up, UART4_RX and ATIM_CH1N. |
| 15 | PB3 | bidirectional | GPIO with UART4_TX and ATIM_CH2N. |
| 16 | PB4 | bidirectional | GPIO with LCD SEG3 and ATIM_CH1. |
| 17 | PB5 | bidirectional | GPIO with LCD SEG4 and ATIM_CH2. |
| 18 | PB8 | bidirectional | GPIO with LCD SEG7, SPI1_SSN and ATIM_CH3N. |
| 19 | PB9 | bidirectional | GPIO with LCD SEG8, ANATST analog test, SPI1_SCK and GPT0_ETR. |
| 20 | PB10 | bidirectional | GPIO with LCD SEG9, OPA1_INN1 input, SPI1_MISO and GPT0_CH1. |
| 21 | PB11 | bidirectional | GPIO with LCD SEG10, OPA1_INP1 input, SPI1_MOSI and GPT0_CH2. |
| 22 | PB12 | bidirectional | GPIO with WKUP3 wake-up, FOUT1 clock output and ATIM_ETR. |
| 23 | PB13 | bidirectional | GPIO with LCD SEG11, OPA2_INN1 input, UART1_RX and LPUART1_RX. |
| 24 | PB14 | bidirectional | GPIO with LCD SEG12, OPA2_INP1 input, UART1_TX and LPUART1_TX. |
| 25 | PC0 | bidirectional | GPIO with OPA2_INN2 input and GPT1_CH1. |
| 26 | PC1 | bidirectional | GPIO with OPA2_INP2 input and GPT1_CH2. |
| 27 | PC2 | bidirectional | GPIO with XTHIN high-frequency crystal input, UART1_RX and LPUART1_RX. |
| 28 | PC3 | bidirectional | GPIO with XTHOUT high-frequency crystal output, UART1_TX and LPUART1_TX. |
| 29 | PC4 | bidirectional | GPIO with LCD SEG13, OPA1_OUT output and UART5_RX. |
| 30 | PC5 | bidirectional | GPIO with LCD SEG14, OPA2_OUT output and UART5_TX. |
| 31 | PC6 | bidirectional | GPIO with WKUP4 wake-up, LCD SEG15, GPT1_ETR and ADC_IN11. |
| 32 | PC7 | bidirectional | GPIO with LCD SEG16, SPI2_SSN and ADC_IN8. |
| 33 | PC8 | bidirectional | GPIO with LCD SEG17, SPI2_SCK and ADC_IN9. |
| 34 | PC9 | bidirectional | GPIO with LCD SEG18, SPI2_MISO and ADC_IN0. |
| 35 | PC10 | bidirectional | GPIO with WKUP5 wake-up, LCD SEG19, SPI2_MOSI and ADC_IN1. |
| 36 | PD9 | bidirectional | GPIO with XT32KO 32768Hz crystal output. |
| 37 | PD10 | bidirectional | GPIO with XT32KI 32768Hz crystal input. |
| 38 | VDD15 | power_out | LDO output; connect a 100nF capacitor to ground. |
| 39 | VSS | power_in | Ground. |
| 40 | VDD | power_in | Power supply. |
| 41 | PD11 | bidirectional | GPIO with WKUP6 wake-up, FOUT0 clock output, ATIM_BRK1 brake input and ADC_IN2. |
| 42 | PD0 | bidirectional | GPIO with LCD SEG22, UART5_RX and ADC_IN3. |
| 43 | PD1 | bidirectional | GPIO with LCD SEG23, UART5_TX and ADC_IN4. |
| 44 | PD6 | bidirectional | GPIO with WKUP7 wake-up, ANATST analog test and ATIM_BRK2 brake input. |
| 45 | PD7 | bidirectional | GPIO with SWCLK SWD interface clock. |
| 46 | PD8 | bidirectional | GPIO with SWIO SWD interface data. |
| 47 | NRST | input | Global reset pin; held low for more than 8ms it resets the chip (not the debug logic). |
| 48 | PA13 | bidirectional | GPIO with UART0_RX, LPUART0_RX and ADC_IN6. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | FUDAN MICRO |
| Package | LQFP-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD-VSS (incl. VDDA) | VDD-VSS | -0.3 | 6.5 | V | 63 | ||
| Pin voltage | VPIN | -0.3 | 6.5 | V | min is VSS-0.3 | 63 | |
| Voltage difference between VDD and VDDA | /ΔVDD/ | 50 | mV | 63 | |||
| Voltage difference between all ground pins | /ΔVSS/ | 50 | mV | 63 | |||
| Operating temperature | TA | -40 | 85 | °C | 63 | ||
| Storage temperature | TSTG | -55 | 150 | °C | 63 | ||
| ESD HBM (except PA11, PA12, PB12) | HBM | -8000 | 8000 | V | TA=25℃, JEDEC JS-001 | 63 | |
| ESD HBM (PA11, PA12, PB12) | HBM | -5000 | 5000 | V | TA=25℃, JEDEC JS-001 | 63 | |
| ESD CDM | CDM | -1000 | 1000 | V | TA=25℃, JEDEC JS-002 | 63 | |
| Latch-up trigger current | Itrigger | -125 | 125 | mA | -(0.5VDD)<VI<(1.5VDD), TA=25℃, JESD78E | 63 | |
| Latch-up supply voltage | Vsupply | 8.25 | V | TA=25℃, JESD78E | 63 | ||
| Max current into VDD (source) | ΣIVDD | 90 | mA | 63 | |||
| Max current out of VSS (sink) | ΣIVSS | 70 | mA | 63 | |||
| Total IO sink current | ΣIIO | 90 | mA | all IO sink | 63 | ||
| Total IO source current | ΣIIO | 70 | mA | all IO source | 63 | ||
| AHB clock frequency | fHCLK | 0 | 64 | Mhz | 64 | ||
| APB clock frequency | fPCLK | 0 | 64 | Mhz | 64 | ||
| Operating voltage (no USB) | VDD | 1.8 | 5.5 | V | BOR enabled | 64 | |
| Operating voltage (no USB) | VDD | 1.35 | 5.5 | V | BOR disabled | 64 | |
| Analog operating voltage (no USB) | VDDA | 1.8 | 5.5 | V | VDDA=VDD required | 64 | |
| Junction temperature | TJ | -40 | 105 | °C | TA=-40~+85C | 64 |
CAD (KiCad official)
- Symbol:
FM33LC045N - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
fm33lc045n-etched.step/fm33lc045n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);fm33lc045n.step/fm33lc045n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: FUDAN MICRO datasheet (707 pp, sha256
6d623d96ef650faf, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).