MP1475DJ-LF-Z from Monolithic Power Systems, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PG	output	Open-drain power-good output that goes high when the output voltage exceeds 90% of nominal, with a 0.4ms delay after FB reaches 90%.
2	IN	power_in	Supply voltage input for the internal MOSFETs and regulator, operating from 4.5V to 16V and requiring a low-ESR input capacitor placed very close to the pin.
3	SW	passive	Switch output connecting to the inductor and bootstrap capacitor, driven up to VIN by the high-side switch during the PWM on-time.
4	GND	power_in	System ground and reference ground of the regulated output voltage, to be connected to copper with vias.
5	BST	passive	Bootstrap pin requiring a capacitor between SW and BST to form a floating supply across the high-side switch driver.
6	EN/SYNC	input	Enable input (high enables the part) that also accepts an external clock of 200kHz to 2MHz for synchronization, clamped internally by a 6.5V Zener.
7	VCC	power_out	Internal 5V LDO output powering the driver and control circuits, to be decoupled with a 0.1µF-0.22µF capacitor (not ≥0.22µF).
8	FB	input	Feedback input connected to an external resistor divider from the output to GND to set the output voltage, with fold-back of the frequency when FB is below 400mV.

Key specifications

Parameter	Value
Manufacturer	Monolithic Power Systems
Package	TSOT-23-8
Category	Power Management (PMIC)
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input voltage	VIN	-0.3		17	V		2
Switch node voltage	VSW	-0.3		17	V	-5V for <10ns min; 19V for <10ns max	2
Bootstrap voltage	VBST			6	V	VSW+6V	2
All other pins voltage		-0.3		6	V	see EN/SYNC section for EN pin	2
Continuous power dissipation	PD			1.25	W	TA = +25°C	2
Junction temperature	TJ			150	°C		2
Storage temperature		-65		150	°C		2
Supply voltage	VIN	4.5		16	V		2
Operating junction temperature	TJ	-40		125	°C		2
Thermal resistance junction-ambient	θJA		100		°C/W	TSOT-23-8, JESD51-7 4-layer PCB	2
Thermal resistance junction-case	θJC		55		°C/W	TSOT-23-8, JESD51-7 4-layer PCB	2
Supply current (shutdown)	IIN		7		μA	VEN = 0V	3
Supply current (quiescent)	Iq		0.6	1	mA	VEN = 2V, VFB = 1V	3
HS switch on-resistance	HSRDS-ON		80		mΩ	VBST-SW=5V	3
LS switch on-resistance	LSRDS-ON		30		mΩ	VCC =5V	3
Switch leakage	SWLKG			1	μA	VEN = 0V, VSW =12V	3
Current limit	ILIMIT	4.2	5		A	Under 40% Duty Cycle; guaranteed by design	3
Oscillator frequency	fSW	430	500	570	kHz	VFB=0.75V	3
Fold-back frequency	fFB		0.25		fSW	VFB<400mV	3
Maximum duty cycle	DMAX	90	95		%	VFB=700mV	3
Minimum on time	τON_MIN		40		ns	guaranteed by design	3
Sync frequency range	fSYNC	0.2		2	MHz		3
Feedback voltage	VFB	791	807	823	mV	TA =25°C	3
Feedback voltage over temperature	VFB	787	807	827	mV	-40°C<TA<85°C; not tested in production	3
Feedback current	IFB		10	50	nA	VFB=820mV	3
EN rising threshold	VEN_RISING	1.2	1.4	1.6	V		3
EN falling threshold	VEN_FALLING	1.1	1.25	1.4	V		3
EN input current	IEN		2		μA	VEN=2V	3
EN input current	IEN		0		μA	VEN=0	3
EN turn-off delay	ENtd-off		5		μs		3
Power-good rising threshold	PGvth-Hi		0.9		VFB		3
Power-good falling threshold	PGvth-Lo		0.85		VFB		3
Power-good delay	PGTd		0.4		ms		3
Power-good sink capability	VPG			0.4	V	Sink 4mA	3
Power-good leakage current	IPG-LEAK			1	μA		3
VIN UVLO threshold rising	INUVVth	3.7	3.9	4.1	V		3
VIN UVLO hysteresis	INUVHYS		650		mV		3
VCC regulator	VCC		5		V		3
VCC load regulation			3		%	ICC=5mA	3
Soft-start period	τSS		1.2		ms		3
Thermal shutdown			150		°C	guaranteed by design	3
Thermal hysteresis			20		°C	guaranteed by design	3

CAD (KiCad official)

Symbol: MP1475DJ-LF-Z
Footprint: Package_TO_SOT_SMD:TSOT-23-8
3D model: TSOT-23-8 (KiCad packages3D, STEP)
3D model files: mp1475dj-lf-z-etched.step / mp1475dj-lf-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mp1475dj-lf-z.step / mp1475dj-lf-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Monolithic Power Systems datasheet (16 pp, sha256 fb0e968aedbef766, retrieved 2026-10-30, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MP1475DJ-LF-Z

Verified MP1475DJ-LF-Z

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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