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EA910418T5R
Public Made by Adomby adom
Everanalog IC design Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownEA910418T5R
Everanalog IC design · Linear Voltage Regulators (LDO) · SOT-23-5
EA910418T5R from Everanalog IC design, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage pin, operating range 2V to 5.5V (absolute maximum -0.3V to +6V). |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Enable pin with an internal 1MΩ pull-down to GND; above 1.2V turns the regulator on, below 0.4V shuts it down. |
| 4 | NC | unconnected | Not connected on the fixed output voltage version. |
| 5 | VOUT | power_out | Regulated output voltage pin (1.8V for this version), 300mA output current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Everanalog IC design |
| Package | SOT-23-5 |
| Category | Power Supply Chip |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy | ΔVOUT | -2 | 2 | % | IOUT = 1mA | 4 | |
| Output Loading Current | ILOAD | 300 | mA | VEN = VIN, VIN >2.5V | 4 | ||
| Current Limit | ILIM | 450 | 550 | mA | RLOAD = 1Ω | 4 | |
| Quiescent Current | IQ | 100 | 130 | uA | VEN ≥ 1.2V, IOUT = 0mA | 4 | |
| Standby Current | ISTBY | 0.1 | 1 | uA | VEN = GND, Shutdown | 4 | |
| EN Input Bias Current | IIBSD | 2 | 3.5 | 5 | uA | VEN = 3.5V | 4 |
| EN Threshold Low Voltage | VIL | 0.4 | V | VIN = 3V to 5.5V, Shutdown | 4 | ||
| EN Threshold High Voltage | VIH | 1.2 | V | VIN = 3V to 5.5V, Start-up | 4 | ||
| Input Supply Voltage (absolute maximum) | VIN | -0.3 | 6 | V | 3 | ||
| Lead Temperature | 260 | °C | Soldering, 10 sec | 3 | |||
| Storage Temperature Range | TS | -65 | 150 | °C | 3 | ||
| ESD Susceptibility (HBM) | 2 | kV | 3 | ||||
| ESD Susceptibility (MM) | 200 | V | 3 | ||||
| Ambient Temperature Range | TA | -20 | 85 | °C | 3 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 3 | ||
| Input Voltage Range | VIN | 2 | 5.5 | V | 1 | ||
| Power Dissipation | PDmax | 0.4 | W | SOT-23-5, TA=25°C | 3 | ||
| Thermal Resistance Junction to Case | θJC | 125 | °C/W | SOT-23-5 | 3 | ||
| Thermal Resistance Junction to Ambient | θJA | 250 | °C/W | SOT-23-5 | 3 | ||
| Line Regulation | ΔVLINE | 0.3 | % | VIN = (VOUT+1V) to 5.5V, IOUT = 1mA | 4 | ||
| Load Regulation | ΔLOAD | 2 | % | 1mA < IOUT < 300mA | 4 | ||
| Output Noise Voltage | 100 | uVRMS | 10Hz to 100kHz, IOUT = 200mA, COUT = 1uF | 4 | |||
| Power Supply Rejection Rate f = 100Hz | PSRR | -76 | dB | COUT = 1uF, IOUT = 10mA | 4 | ||
| Power Supply Rejection Rate f = 10kHz | PSRR | -65 | dB | COUT = 1uF, IOUT = 10mA | 4 | ||
| Thermal Shutdown Threshold | TSD | 165 | °C | 4 |
CAD (KiCad official)
- Symbol:
EA910418T5R - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ea910418t5r-etched.step/ea910418t5r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ea910418t5r.step/ea910418t5r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Everanalog IC design datasheet (9 pp, sha256
8131d6d2e89216e6, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).