JL7016G8 from JieLi Tech, in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DACLN	output	Differential DAC Left Negative Channel (analog audio output).
2	DACLP	output	Differential DAC Left Positive Channel (analog audio output).
3	HPVDD	power_in	Audio (headphone) analog supply. Absolute max +3 V; must be a clean quiet rail for the DAC output stage.
4	PE6/PG8	bidirectional	General-purpose I/O. Alt functions: SDPG (SD-card supply-voltage output), MICIN2 / MIC2_P differential MIC2 positive input, AMUX_C0 analog mux channel C0 input.
5	PG7	bidirectional	General-purpose I/O. Alt functions: MIC_BIAS2 (built-in-resistor MIC bias), MIC2_N differential MIC2 negative, AMUX_C1 analog mux input, ADC15 10-bit ADC channel 15.
6	PG6	bidirectional	General-purpose I/O. Alt functions: MICIN3 / MIC3_P differential MIC3 positive, AMUX_D0 analog mux input, FPIN2 fault detect input 2.
7	PG5	bidirectional	General-purpose I/O. Alt functions: MIC_BIAS3 (built-in-resistor MIC bias), MIC3_N differential MIC3 negative, AMUX_D1 analog mux input, ADC14 10-bit ADC channel 14, TMR3CK PWM Timer3 clock input.
8	PGND	power_in	Ground of the integrated Buck DC-DC converter. Tie to system ground close to the inductor return.
9	SW	power_out	Switch node of the integrated Buck DC-DC converter - connects to the external inductor.
10	VBAT	power_in	Battery interface / main system supply. Operating range 2.2 V - 4.5 V (abs max 4.5 V). Feeds the internal LDO/Buck.
11	VPWR/PP0	power_in	Charger power input (4.5 V - 5.5 V, abs max 6 V) for the built-in lithium charger (up to 200 mA). Also usable as high-voltage-resistant GPIO PP0 with alt functions UART0TXB / UART0RXB, PWM3 (Timer3 PWM out), CAP1 (Timer1 capture).
12	IOVDD	power_out	Built-in linear regulator output for I/O rail. Typ 3.0 V, up to 200 mA. Decouple with a bulk cap; also powers external I/O logic.
13	DCVDD	power_in	Internal (digital core) power rail. Typ 1.25 V. Fed by the internal Buck (via SW/inductor) or internal LDO.
14	PB5	bidirectional	High-voltage-resistant GPIO. Alt functions: LP_Touch4 (low-power touch ch4), IIC1_SDA_A, ADC8 (10-bit ADC ch8), UART3RXB.
15	PB4	bidirectional	High-voltage-resistant GPIO. Alt functions: LP_Touch3, CLKOUT0, SPI4DIA (SPI4 data in A), IIC1_SCL_A, UART3TXB, TMR2 (Timer2 clock input).
16	PB1	bidirectional	High-voltage-resistant GPIO. Hold at logic 0 to reset the chip. Alt functions: LP_Touch1, ADC6.
17	BTRF	bidirectional	Bluetooth RF antenna interface. Route as a controlled-impedance 50 Ω trace to an impedance-matching network and chip antenna.
18	XOSCI	input	System crystal oscillator input. Connect to one terminal of the 24 MHz crystal with load caps to ground.
19	XOSCO	output	System crystal oscillator output. Connect to the other terminal of the 24 MHz crystal with load caps to ground.
20	PC5	bidirectional	General-purpose I/O. Alt functions: SPI0_DAT2C, SD0_CLKA, SPI1DOB, IIC0_SDA_B, ALNK_DAT3B (audio-link data3), ADC5, UART2RXA.
21	PC4	bidirectional	General-purpose I/O. Alt functions: SPI0_DIC, SD0CMDA, SPI1CLKB, IIC0_SCL_B, ALNK_DAT2B, ADC4, UART2TXA, PWM4 (Timer4 PWM output).
22	PC3	bidirectional	General-purpose I/O. Alt functions: SPI0_CSC (chip select), SD0DATOA, SPI1DIB, ALNK_LRCKB (audio-link word select), TMR3 (Timer3 clock input).
23	USBDM	bidirectional	USB 2.0 full-speed D- (negative data, internal pull-down). Alt functions: SDTAP_DATB, SPI2DOB, IIC0_SDA_A, ADC11, UART1RXB.
24	USBDP	bidirectional	USB 2.0 full-speed D+ (positive data, internal pull-down). Alt functions: SDTAP_CLKB, SPI2CLKB, IIC0_SCL_A, ADC10, UART1TXB.
25	PA4	bidirectional	General-purpose I/O. Alt functions: MIC_BIAS1, MIC1_N differential MIC1 negative, AMUX_B1 analog mux input, SPI2DIA, ALNK_DAT1A, CAP2 (Timer2 capture).
26	PA3	bidirectional	General-purpose I/O. Alt functions: MICIN1 / MIC1_P differential MIC1 positive, AMUX_B0 analog mux input, SPI1DOA, ALNK_DAT0A, PWM1 (Timer1 PWM output).
27	PA2	bidirectional	General-purpose I/O. Alt functions: MIC_BIAS0, MIC0_N differential MIC0 negative, AMUX_A1 analog mux input, CLKOUT1, SPI1CLKA, ALNK_MCLKA (audio-link master clock), UART1RXA, CAP3 (Timer3 capture).
28	PA1	bidirectional	General-purpose I/O. Alt functions: MICIN0 / MIC0_P differential MIC0 positive, AMUX_A0 analog mux input, SPI1DIA, UART1TXA, PWM0 (Timer0 PWM output).
29	PA0	bidirectional	General-purpose I/O. Alt functions: MICLDO (MIC power supply), ADC0 (10-bit ADC channel 0).
30	ACM	passive	Audio analog reference bias. Bypass to AVSS with a decoupling cap per Jieli reference design.
31	VCM	passive	Audio analog reference bias (common-mode). Bypass to AVSS with a decoupling cap per Jieli reference design.
32	AVSS	power_in	Audio analog ground. Tie to system ground through a single-point / star connection to minimize noise coupling.
33	VSS	power_in	Exposed thermal / EPAD system ground. Solder to the PCB ground plane with a stitching via array for thermal and electrical performance.

Key specifications

Parameter	Value
Manufacturer	JieLi Tech
Package	QFN-32(4x4)
Category	Embedded Processors & Controllers
Pins	33

Ordering variants

Same part, different packaging or reel option.

JL7016G8

CAD (KiCad official)

Symbol: JL7016G8
Footprint: Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm
3D model: QFN-32(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: JieLi Tech datasheet (18 pp, sha256 cb9fdc82553aa3bd, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF