component
PJ56L50SE
Public Made by Adomby adom
PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPJ56L50SE
PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
PJ56L50SE from PJSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage; the datasheet gives a recommended supply range of 5 to 60 V, with an absolute maximum VIN-to-GND voltage of -0.3 to +80 V. |
| 2 | GND | power_in | Ground reference for the regulator; decoupling capacitors should be placed close to the VIN and GND pins with wide copper traces. |
| 3 | NC | unconnected | No connection; the pin is not connected internally. |
| 4 | NC | unconnected | No connection; the pin is not connected internally. |
| 5 | VOUT | power_out | Regulated output voltage; the output can deliver up to 150 mA, with an absolute maximum VOUT-to-GND voltage of +6 V, and requires a minimum 10 µF ceramic output capacitor placed close to VOUT and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PJSEMI |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 5 | 60 | V | 7 | ||
| Output Voltage Accuracy | ΔVOUT | -2 | 2 | % | VIN=12V, IOUT=10mA | 7 | |
| Dropout Voltage | VDROP | 150 | mV | VIN=VOUTNOM-0.1V, IOUT=10mA | 7 | ||
| Dropout Voltage | VDROP | 700 | mV | VIN=VOUTNOM-0.1V, IOUT=100mA | 7 | ||
| Supply Voltage | VIN | 5 | 60 | V | 6 | ||
| Maximum Output Current | 150 | mA | 6 | ||||
| Operating Ambient Temperature | -40 | 85 | °C | 6 | |||
| VIN to GND Voltage | -0.3 | 80 | V | 6 | |||
| VOUT to GND Voltage | -0.3 | 6 | V | 6 | |||
| VOUT to VIN Voltage | -35 | 0.3 | V | 6 | |||
| Power Dissipation | 400 | mW | SOT-23-5 package | 6 | |||
| Operating Ambient Temperature | -40 | 85 | °C | 6 | |||
| Junction Temperature | 150 | °C | 6 | ||||
| Storage Temperature Range | -40 | 150 | °C | 6 | |||
| ESD Voltage (HBM) | 4 | KV | HBM | 6 | |||
| ESD Voltage (MM) | 100 | V | MM | 6 | |||
| Thermal Resistance, Junction-to-Ambient | 300 | °C/W | SOT-23-5 package | 6 |
CAD (KiCad official)
- Symbol:
PJ56L50SE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
pj56l50se-etched.step/pj56l50se-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pj56l50se.step/pj56l50se.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PJSEMI datasheet (21 pp, sha256
38751d6877f98995, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).