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DMN2046U-7

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Diodes Incorporated MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistorsdmn2046u-7factory-2.0.0extractor-text

Verified DMN2046U-7

by Ray · last 12 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

12 Nov 2026RayPublished by the parts factory: tier mfr, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DMN2046U-7 · SOT-23 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 6-page datasheet
  • ✓distributor: lcsc C332300, digikey DMN2046U-7DITR-ND, mouser 621-DMN2046U-7
  • ✓family: SOT-23
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-vbn50y9o/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.5)
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 17 kB, viewers/symbol.html 7 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ dmn2046u-7.kicad_sym✓ dmn2046u-7.kicad_mod✓ dmn2046u-7.step
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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

markdown

DMN2046U-7

Diodes Incorporated · MOSFETs · SOT-23

DMN2046U-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin Name Type Function
1 G input Gate, ESD-protected through an internal gate protection diode, with absolute maximum VGSS of ±12 V and a gate threshold voltage VGS(th) of 0.4 V min to 1.4 V max.
2 S passive Source terminal of the N-channel MOSFET, with a body diode forward voltage VSD of 1.2 V max at IS = 0.94 A.
3 D passive Drain terminal with a drain-source voltage VDSS of 20 V and a continuous drain current of 3.4 A at TA = +25°C.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS 20 V VGS = 0V, ID = 250μA 2
Zero Gate Voltage Drain Current IDSS 1 μA TJ = +25°C, VDS = 20V, VGS = 0V 2
Gate-Source Leakage IGSS 10 μA VGS = ±10V, VDS = 0V 2
Gate Threshold Voltage VGS(th) 0.4 1.4 V VDS = VGS, ID = 250μA 2
Static Drain-Source On-Resistance RDS(ON) 72 mΩ VGS = 4.5V, ID = 3.6A 2
Static Drain-Source On-Resistance RDS(ON) 110 mΩ VGS = 2.5V, ID = 3.1A 2
Diode Forward Voltage VSD 1.2 V VGS = 0V, IS = 0.94A 2
Drain-Source Voltage VDSS 20 V 2
Gate-Source Voltage VGSS -12 12 V 2
Continuous Drain Current (steady state, TA = +25°C) ID 3.4 A VGS = 10V, steady state, TA = +25°C 2
Continuous Drain Current (steady state, TA = +70°C) ID 2.7 A VGS = 10V, steady state, TA = +70°C 2
Pulsed Drain Current IDM 18 A Pulse width ≤10µS, Duty Cycle ≤1% 2
Power Dissipation PD 0.76 W Note 5: FR-4 PCB, 2oz copper, minimum recommended pad layout 2
Power Dissipation PD 1.26 W Note 6: FR-4 PCB, 2oz copper, thermal bias to bottom layer 1-inch square copper plate 2
Thermal Resistance, Junction to Ambient RθJA 166 °C/W Note 5: FR-4 PCB, 2oz copper, minimum recommended pad layout 2
Thermal Resistance, Junction to Ambient RθJA 100 °C/W Note 6: FR-4 PCB, 2oz copper, 1-inch square copper plate 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminals: Finish  Matte Tin Annealed over Copper Leadframe. 1

CAD (land: KiCad; 3D: generated from the datasheet)

  • Symbol: DMN2046U-7
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23, generated on the KiCad land (body 1.3 x 2.9 mm, terminals on the pads, 0.975 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
  • 3D model files: dmn2046u-7-etched.step / dmn2046u-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmn2046u-7.step / dmn2046u-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 9b86e87a0ffd7caa, retrieved 2026-11-12, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF