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MSP430G2433IPW20
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Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2433IPW20
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
MSP430G2433IPW20 from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage pin. |
| 2 | P1.0/TA0CLK/ACLK/A0 | bidirectional | General-purpose digital I/O pin, also Timer0_A TACLK input, ACLK signal output, and ADC10 analog input A0 (ADC10 on MSP430G2x33 devices only). |
| 3 | P1.1/TA0.0/UCA0RXD/UCA0SOMI/A1 | bidirectional | General-purpose digital I/O pin, also Timer0_A CCI0A capture input and Out0 compare output, BSL transmit, USCI_A0 UART receive data or SPI slave data out, and ADC10 analog input A1. |
| 4 | P1.2/TA0.1/UCA0TXD/UCA0SIMO/A2 | bidirectional | General-purpose digital I/O pin, also Timer0_A CCI1A capture input and Out1 compare output, USCI_A0 UART transmit data or SPI slave data in/master out, and ADC10 analog input A2. |
| 5 | P1.3/ADC10CLK/A3/VREF-/VEREF- | bidirectional | General-purpose digital I/O pin, also ADC10 conversion clock output, ADC10 analog input A3, and ADC10 negative reference voltage. |
| 6 | P1.4/SMCLK/UCB0STE/UCA0CLK/A4/VREF+/VEREF+/TCK | bidirectional | General-purpose digital I/O pin, also SMCLK signal output, USCI_B0 slave transmit enable, USCI_A0 clock input/output, ADC10 analog input A4 and positive reference, and JTAG test clock input for device programming and test. |
| 7 | P1.5/TA0.0/UCB0CLK/UCA0STE/A5/TMS | bidirectional | General-purpose digital I/O pin, also Timer0_A Out0 compare output, BSL receive, USCI_B0 clock input/output, USCI_A0 slave transmit enable, ADC10 analog input A5, and JTAG test mode select input. |
| 8 | P2.0/TA1.0 | bidirectional | General-purpose digital I/O pin, also Timer1_A capture input CCI0A and compare output Out0. |
| 9 | P2.1/TA1.1 | bidirectional | General-purpose digital I/O pin, also Timer1_A capture input CCI1A and compare output Out1. |
| 10 | P2.2/TA1.1 | bidirectional | General-purpose digital I/O pin, also Timer1_A capture input CCI1B and compare output Out1. |
| 11 | P2.3/TA1.0 | bidirectional | General-purpose digital I/O pin, also Timer1_A capture input CCI0B and compare output Out0. |
| 12 | P2.4/TA1.2 | bidirectional | General-purpose digital I/O pin, also Timer1_A capture input CCI2A and compare output Out2. |
| 13 | P2.5/TA1.2 | bidirectional | General-purpose digital I/O pin, also Timer1_A capture input CCI2B and compare output Out2. |
| 14 | P1.6/TA0.1/UCB0SOMI/UCB0SCL/A6/TDI/TCLK | bidirectional | General-purpose digital I/O pin, also Timer0_A Out1 compare output, USCI_B0 SPI slave out/master in or I2C SCL clock, ADC10 analog input A6, and JTAG test data input or test clock input during programming and test. |
| 15 | P1.7/UCB0SIMO/UCB0SDA/A7/TDO/TDI | bidirectional | General-purpose digital I/O pin, also USCI_B0 SPI slave in/master out or I2C SDA data, ADC10 analog input A7, and JTAG test data output or test data input during programming and test. |
| 16 | RST/NMI/SBWTDIO | input | Reset input, also nonmaskable interrupt input and Spy-Bi-Wire test data input/output during programming and test. |
| 17 | TEST/SBWTCK | input | Selects test mode for the JTAG pins on Port 1 and is connected to the device protection fuse, also Spy-Bi-Wire test clock input during programming and test. |
| 18 | XOUT/P2.7 | bidirectional | Output terminal of the crystal oscillator, also general-purpose digital I/O pin P2.7; if used as an input, excess current flows until P2SEL.7 is cleared. |
| 19 | XIN/P2.6/TA0.1 | bidirectional | Input terminal of the crystal oscillator, also general-purpose digital I/O pin P2.6 and Timer0_A Out1 compare output. |
| 20 | DVSS | power_in | Ground reference pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
MSP430G2433IPW20 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
msp430g2433ipw20-etched.step/msp430g2433ipw20-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430g2433ipw20.step/msp430g2433ipw20.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (80 pp, sha256
3610d0fa84aafb0b, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).