LT1763IDE-3.3#TRPBF from Analog Devices, in a DFN-12-EP(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No connect pin with no connection to any internal circuitry; it may be tied to GND or VIN or left floating.
2	OUT	power_out	Output supplies power to the load and requires a minimum output capacitor of 3.3µF to prevent oscillations.
3	OUT	power_out	Output supplies power to the load and requires a minimum output capacitor of 3.3µF to prevent oscillations.
4	NC	unconnected	No connect pin with no connection to any internal circuitry; it may be tied to GND or VIN or left floating.
5	SENSE	input	Output sense is the error amplifier input for fixed-voltage versions including LT1763-3.3; connect it to OUT at the load for optimum regulation.
6	BYP	passive	Bypass pin is internally clamped to ±0.6V; a capacitor of up to 0.01µF from output reduces output noise to a typical 20µVRMS over 10Hz to 100kHz, and it must be left unconnected if not used.
7	GND	power_in	Ground pin that must be tied directly to the exposed pad (pin 13) and used as the return for the output voltage setting divider.
8	SHDN	input	Shutdown input turns the output off when pulled low; it must be connected to VIN if unused, and the device enters shutdown if the pin is left unconnected.
9	NC	unconnected	No connect pin with no connection to any internal circuitry; it may be tied to GND or VIN or left floating.
10	IN	power_in	Input supply pin; a bypass capacitor of 1µF to 10µF is sufficient and the pin withstands reverse voltages with respect to ground and OUT.
11	IN	power_in	Input supply pin; a bypass capacitor of 1µF to 10µF is sufficient and the pin withstands reverse voltages with respect to ground and OUT.
12	NC	unconnected	No connect pin with no connection to any internal circuitry; it may be tied to GND or VIN or left floating.
13	GND	power_in	Exposed pad is the electrical GND connection and must be soldered to the PCB ground for proper electrical and thermal performance.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	DFN-12-EP(3x4)
Category	Power Management ICs
Pins	13

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Regulated Output Voltage LT1763-3.3	VOUT	3.267	3.3	3.333	V	VIN = 3.8V, ILOAD = 1mA	4
Regulated Output Voltage LT1763-3.3	VOUT	3.22	3.3	3.38	V	4.3V < VIN < 20V, 1mA < ILOAD < 500mA	4
Load Regulation LT1763-3.3			7	17	mV	VIN = 4.3V, ∆ILOAD = 1mA to 500mA	4
Line Regulation LT1763-3.3			1	5	mV	∆VIN = 3.8V to 20V, ILOAD = 1mA	4
Dropout Voltage	VDROPOUT		0.13	0.19	V	VIN = VOUT(NOMINAL), ILOAD = 10mA	4
Dropout Voltage	VDROPOUT		0.17	0.22	V	VIN = VOUT(NOMINAL), ILOAD = 50mA	4
Dropout Voltage	VDROPOUT		0.2	0.24	V	VIN = VOUT(NOMINAL), ILOAD = 100mA	4
Dropout Voltage	VDROPOUT		0.3	0.35	V	VIN = VOUT(NOMINAL), ILOAD = 500mA	4
GND Pin Current	IGND		30	75	µA	VIN = VOUT(NOMINAL), ILOAD = 0mA	5
GND Pin Current	IGND		65	120	µA	VIN = VOUT(NOMINAL), ILOAD = 1mA	5
GND Pin Current	IGND		1.1	1.6	mA	VIN = VOUT(NOMINAL), ILOAD = 50mA	5
GND Pin Current	IGND		2	3	mA	VIN = VOUT(NOMINAL), ILOAD = 100mA	5
GND Pin Current	IGND		5	8	mA	VIN = VOUT(NOMINAL), ILOAD = 250mA	5
GND Pin Current	IGND		11	16	mA	VIN = VOUT(NOMINAL), ILOAD = 500mA	5
Ripple Rejection		50	65		dB	VIN, VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 500mA	5
Current Limit	ILIM	520			mA	VIN = VOUT(NOMINAL) + 1V or 2.3V (Note 12), ∆VOUT = -0.1V	5
Input Reverse Leakage Current	IREV			1	mA	VIN = -20V, VOUT = 0V	5
Reverse Output Current LT1763-3.3			10	20	µA	VOUT = 3.3V, VIN < 3.3V	5
Shutdown Threshold (Off to On)	VSHDN	0.65		2	V	VOUT = Off to On	5
Shutdown Threshold (On to Off)	VSHDN	0.25		0.8	V	VOUT = On to Off	5
SHDN Pin Current	ISHDN		0.1		µA	VSHDN = 0V	5
SHDN Pin Current	ISHDN			1	µA	VSHDN = 20V	5
Quiescent Current in Shutdown	IQ(SHDN)		0.1	1	µA	VIN = 6V, VSHDN = 0V	5
Minimum Operating Voltage	VIN(MIN)		1.8	2.3	V	C, I Grade: ILOAD = 500mA	4
Input Voltage Range	VIN	1.8		20	V	Wide Input Voltage Range (Features)	1
Output Capacitor Minimum	COUT	3.3			µF	Minimum output capacitor required to prevent oscillations	13
Output Capacitor ESR	ESR			3	Ω	Maximum ESR of output capacitor for stability	15
IN Pin Voltage	VIN	-20		20	V	Absolute Maximum Ratings	2
OUT Pin Voltage	VOUT	-20		20	V	Absolute Maximum Ratings	2
Input to Output Differential Voltage	VIN-VOUT	-20		20	V	Absolute Maximum Ratings	2
SENSE Pin Voltage	VSENSE	-20		20	V	Absolute Maximum Ratings	2
SHDN Pin Voltage	VSHDN	-20		20	V	Absolute Maximum Ratings	2
Operating Junction Temperature Range (C, I Grade)	TJ	-40		125	°C	C, I Grade	2
Storage Temperature Range (DFN Package)	TSTG	-65		150	°C	DFN Package	2
Maximum Junction Temperature	TJMAX			125	°C	DE (DFN) package	2
Junction-to-Ambient Thermal Resistance	θJA		40		°C/W	DE package, 2500mm2 topside copper, 2500mm2 board area	16
Junction-to-Case Thermal Resistance	θJC		5		°C/W	DE package	2
Output Voltage Noise	VN		20		µVRMS	COUT = 10µF, CBYP = 0.01µF, ILOAD = 500mA, BW = 10Hz to 100kHz	5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	COPPER		Table 1. DE Package, 12-Lead DFN COPPER AREA	16

CAD (KiCad official)

Symbol: LT1763IDE-3.3#TRPBF
Footprint: Package_DFN_QFN:DFN-12-1EP_3x4mm_P0.5mm_EP1.7x3.3mm
3D model: DFN-12-EP(3x4) (KiCad packages3D, STEP)
3D model files: lt1763ide-3-3-trpbf-etched.step / lt1763ide-3-3-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1763ide-3-3-trpbf.step / lt1763ide-3-3-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (22 pp, sha256 2bc1aa72821928b4, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

LT1763IDE-3.3#TRPBF

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3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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