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TS951IDT

Public Made by Adom

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STMicroelectronics Operational Amplifier, SO-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TS951IDT

STMicroelectronics · Operational Amplifier · SO-8

TS951IDT from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connect pin, not internally connected per the TS951ID pinout.
2 Inverting input 1 input Inverting input of the amplifier; input voltage range VDD - 0.2 V to VCC + 0.2 V, differential input limited to ±1 V.
3 Non-inverting input 1 input Non-inverting input of the amplifier; input voltage range VDD - 0.2 V to VCC + 0.2 V, differential input limited to ±1 V.
4 VDD power_in Negative supply rail (ground in single-supply use, VDD = 0 V in the electrical characteristics).
5 NC unconnected No connect pin, not internally connected per the TS951ID pinout.
6 Output 2 output Rail-to-rail amplifier output, drawing from the VDD to VCC supply; short-circuit current typically 10 mA.
7 VCC power_in Positive supply, operating range 2.7 V to 12 V, absolute maximum 14 V.
8 NC unconnected No connect pin, not internally connected per the TS951ID pinout.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage Vio 6 mV VCC = 3 V, VDD = 0 V, RL to VCC/2, Tamb = 25 °C 4
Input offset voltage over temperature Vio 8 mV VCC = 3 V, Tmin ≤ Tamb ≤ Tmax 4
Input offset current Iio 1 30 nA VCC = 3 V, Tamb = 25 °C 4
Input offset current over temperature Iio 80 nA VCC = 3 V, Tmin ≤ Tamb ≤ Tmax 4
Input bias current Iib 35 100 nA VCC = 3 V, Vicm = VCC/2 4
Input bias current over temperature Iib 200 nA VCC = 3 V, Tmin ≤ Tamb ≤ Tmax 4
Common mode rejection ratio CMR 50 80 VCC = 3 V, Tamb = 25 °C 4
Supply voltage rejection ratio SVR 60 80 dB VCC = 2.7 V to 3.3 V 4
Large signal voltage gain Avd 80 VCC = 3 V, Vo = 2 Vpk-pk, RL = 600 Ω 4
High level output voltage VOH 2.8 2.9 V VCC = 3 V, RL = 600 Ω 4
Low level output voltage VOL 80 250 mV VCC = 3 V, RL = 600 Ω 4
Supply current (per amplifier) ICC 0.9 1.3 VCC = 3 V, no load, Vicm = VCC/2 4
Input offset voltage drift ∆Vio/∆T 2 µV/°C VCC = 3 V 4
Gain bandwidth product GBP 3 MHz VCC = 3 V, RL = 2 kΩ 4
Slew rate SR 1 V/µs VCC = 3 V 4
Phase margin at unit gain Øm 60 Degrees VCC = 3 V, RL = 600 Ω, CL = 100 pF 4
Gain margin Gm 10 dB VCC = 3 V, RL = 600 Ω, CL = 100 pF 4
Equivalent input noise voltage en 25 nV / √Hz VCC = 3 V, f = 1 kHz 4
Total harmonic distortion THD 0.01 % VCC = 3 V, Vout = 4 Vpk-pk, F = 10 kHz, AV = 2, RL = 10 kΩ 4
Output short-circuit current Isc 10 mA VCC = 3 V 4
Input offset voltage Vio 6 mV VCC = 5 V, VDD = 0 V, RL to VCC/2, Tamb = 25 °C 5
Input offset voltage over temperature Vio 8 mV VCC = 5 V, Tmin ≤ Tamb ≤ Tmax 5
Input offset current Iio 1 30 nA VCC = 5 V, Vicm = VCC/2 5
Input offset current over temperature Iio 80 nA VCC = 5 V, Tmin ≤ Tamb ≤ Tmax 5
Input bias current Iib 35 100 nA VCC = 5 V, Vicm = VCC/2 5
Input bias current over temperature Iib 200 nA VCC = 5 V, Tmin ≤ Tamb ≤ Tmax 5
Common mode rejection ratio CMR 50 80 VCC = 5 V, Tamb = 25 °C 5
Supply voltage rejection ratio SVR 60 80 dB VCC = 2.7 V to 3.3 V 5
Large signal voltage gain Avd 86 VCC = 5 V, Vo = 2 Vpk-pk, RL = 600 Ω 5
High level output voltage VOH 4.7 4.8 V VCC = 5 V, RL = 600 Ω 5
Low level output voltage VOL 80 300 mV VCC = 5 V, RL = 600 Ω 5
Supply current (per amplifier) ICC 0.95 1.4 VCC = 5 V, no load, Vicm = VCC/2 5
Input offset voltage drift ∆Vio/∆T 2 µV/°C VCC = 5 V 5
Gain bandwidth product GBP 3 MHz VCC = 5 V, RL = 2 kΩ 5
Slew rate SR 1 V/µs VCC = 5 V 5
Phase margin at unit gain Øm 60 Degrees VCC = 5 V, RL = 600 Ω, CL = 100 pF 5
Gain margin Gm 10 dB VCC = 5 V, RL = 600 Ω, CL = 100 pF 5
Equivalent input noise voltage en 25 nV / √Hz VCC = 5 V, f = 1 kHz 5
Total harmonic distortion THD 0.01 % VCC = 5 V, Vout = 4 Vpk-pk, F = 10 kHz, AV = 2, RL = 10 kΩ 5
Output short-circuit current Isc 10 mA VCC = 5 V 5
Supply voltage VCC 14 V Do not exceed 14 V (absolute maximum) 2
Differential input voltage Vid -1 1 V If Vid > ±1 V, input current must not exceed ±1 mA 2
Storage temperature range Tstg -65 150 °C 2
Maximum junction temperature Tj 150 °C 2
ESD HBM (human body model) HBM 1 kV TS951 device 2
ESD MM (machine model) MM 120 V Machine model 2
ESD CDM (charged device model) CDM 1.5 kV TS951 device 2
Latch-up immunity Latch-up 200 mA 2
Lead temperature (soldering) 260 °C Soldering, 10 s 2
Thermal resistance junction-to-ambient, SO8 Rthja 125 °C/W SO8 package; typical value 2
Thermal resistance junction-to-case, SO8 Rthjc 40 °C/W SO8 package; typical value 2
Supply voltage (operating) VCC 2.7 12 V 3
Operating free air temperature range Toper -40 125 °C 3

CAD (KiCad official)

  • Symbol: TS951IDT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: ts951idt-etched.step / ts951idt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts951idt.step / ts951idt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (15 pp, sha256 aba0323120db01af, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF