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BLUENRG-248
Public Made by Adomby adom
STMicroelectronics RF Transceiver ICs, QFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownBLUENRG-248
STMicroelectronics · RF Transceiver ICs · QFN-48-EP(6x6)
BLUENRG-248 from STMicroelectronics, in a QFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIO24 | bidirectional | General purpose digital I/O. |
| 2 | DIO23 | bidirectional | General purpose digital I/O. |
| 3 | DIO22 | bidirectional | General purpose digital I/O. |
| 4 | DIO8 | bidirectional | General purpose digital I/O. |
| 5 | DIO7/BOOT | bidirectional | Bootloader pin / general purpose digital I/O; monitored by the bootloader after power-up or hardware reset and should be low to prevent unwanted bootloader activation. |
| 6 | DIO21 | bidirectional | General purpose digital I/O. |
| 7 | DIO6 | bidirectional | General purpose digital I/O. |
| 8 | VBAT4 | power_in | Battery voltage input. |
| 9 | DIO5 | bidirectional | General purpose digital I/O. |
| 10 | DIO20 | bidirectional | General purpose digital I/O. |
| 11 | DIO19 | bidirectional | General purpose digital I/O. |
| 12 | DIO18 | bidirectional | General purpose digital I/O. |
| 13 | DIO4 | bidirectional | General purpose digital I/O. |
| 14 | DIO3 | bidirectional | General purpose digital I/O. |
| 15 | DIO2 | bidirectional | General purpose digital I/O. |
| 16 | DIO1 | bidirectional | General purpose digital I/O. |
| 17 | DIO17 | bidirectional | General purpose digital I/O. |
| 18 | DIO0 | bidirectional | General purpose digital I/O. |
| 19 | DIO16 | bidirectional | General purpose digital I/O. |
| 20 | DIO15 | bidirectional | General purpose digital I/O. |
| 21 | DIO14 | bidirectional | General purpose digital I/O. |
| 22 | VBAT4 | power_in | Battery voltage input. |
| 23 | ANATEST0 | output | Analog output. |
| 24 | ANATEST1 | output | Analog output; switches high before a transmission or reception event and low at its end, usable for external antenna switching and coexistence. |
| 25 | ADC1 | input | ADC input 1. |
| 26 | ADC2 | input | ADC input 2. |
| 27 | FXTAL1 | input | 16/32 MHz crystal connection. |
| 28 | FXTAL0 | input | 16/32 MHz crystal connection. |
| 29 | VBAT2 | power_in | Battery voltage input. |
| 30 | RF1 | bidirectional | Antenna and matching circuit connection. |
| 31 | RF0 | bidirectional | Antenna and matching circuit connection. |
| 32 | NC | unconnected | Not connected (shown as NC (open) in the pinout figure). |
| 33 | SXTAL1 | input | 32 kHz crystal connection. |
| 34 | SXTAL0 | input | 32 kHz crystal connection. |
| 35 | VBAT1 | power_in | Battery voltage input. |
| 36 | RESETN | input | System reset input. |
| 37 | SMPSFILT1 | input | SMPS output to external filter. |
| 38 | SMPSFILT2 | bidirectional | SMPS output to external filter / battery voltage input. |
| 39 | VDD1V2 | power_out | 1.2 V digital core output. |
| 40 | VBAT3 | power_in | Battery voltage input. |
| 41 | DIO13 | bidirectional | General purpose digital I/O; can only be used as a general purpose input (not output), and should be pulled down through 10 kOhm if unused. |
| 42 | DIO12 | bidirectional | General purpose digital I/O; can only be used as a general purpose input (not output), and should be pulled down through 10 kOhm if unused. |
| 43 | TEST | input | Test pin, to be tied to GND. |
| 44 | DIO11 | bidirectional | General purpose digital I/O. |
| 45 | VBAT3 | power_in | Battery voltage input. |
| 46 | DIO10 | bidirectional | General purpose digital I/O; SWDIO data signal of the SWD debug port. |
| 47 | DIO9 | bidirectional | General purpose digital I/O; SWCLK clock signal of the SWD debug port. |
| 48 | DIO25 | bidirectional | General purpose digital I/O. |
| 49 | GND | power_in | Exposed ground pad. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | QFN-48-EP(6x6) |
| Category | RF & Radio |
| Pins | 49 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating battery supply voltage | VBAT | 1.7 | 3.6 | V | 140 | ||
| Operating ambient temperature range | TA | -40 | 105 | °C | 140 | ||
| DC-DC converter supply voltage input and output (VBAT3, VBAT2, VBAT1, RESETN, SMPSFILT1, SMPSFILT2) | -0.3 | 3.9 | V | 139 | |||
| DC voltage on linear voltage regulator (VDD1V2) | -0.3 | 1.3 | V | 139 | |||
| DC voltage on digital input/output pins (DIO0 to DIO25, TEST) | -0.3 | 3.9 | V | 139 | |||
| DC voltage on analog pins (ANATEST0, ANATEST1, ADC1, ADC2) | -0.3 | 3.9 | V | 139 | |||
| DC voltage on XTAL pins (FXTAL0, FXTAL1, SXTAL0, SXTAL1) | -0.3 | 1.4 | V | 139 | |||
| DC voltage on RF pins (RF0, RF1) | -0.3 | 1.4 | V | 139 | |||
| Storage temperature range | TSTG | -40 | 125 | °C | 139 | ||
| Electrostatic discharge voltage | VESD-HBM | -2 | 2 | kV | 139 | ||
| Input low voltage | VIL | 0.3 | V | 0.3*VDD | 142 | ||
| Input high voltage | VIH | 0.65 | V | 0.65*VDD | 142 | ||
| Output low voltage | VOL | 0.4 | V | IOL = 3 mA | 142 | ||
| Output high voltage | VOH | 0.7 | V | IOH = 3 mA, 0.7*VDD | 142 | ||
| Reset low time | T(RST)L | 1.5 | ms | 142 | |||
| Pull current, static supply 1.7 V | IPUD | 5 | 10 | µA | Static supply 1.7 V | 142 | |
| Pull current, static supply 3.6 V | IPUD | 40 | 60 | µA | Static supply 3.6 V | 142 | |
| Frequency range | FREQ | 2400 | 2483.5 | MHz | 143 | ||
| RF channel center frequency | RFch | 2402 | 2480 | MHz | 143 | ||
| Maximum output power | PMAX | 8 | 10 | dBm | At antenna connector | 143 | |
| 6 dB bandwidth for modulated carrier (1 Mbps) | PBW1M | 500 | kHz | Using resolution bandwidth of 100 kHz | 143 | ||
| Frequency tolerance (high speed crystal) | fTOL | -50 | 50 | ppm | Includes initial accuracy, stability over temperature, aging and frequency pulling due to incorrect load capacitance | 145 | |
| Equivalent series resistance (high speed crystal) | ESR | 100 | Ω | 145 | |||
| Drive level (high speed crystal) | PD | 100 | µW | 145 | |||
| Frequency tolerance (low speed crystal) | fTOL | -50 | 50 | ppm | Includes initial accuracy, stability over temperature, aging and frequency pulling due to incorrect load capacitance. | 147 | |
| Equivalent series resistance (low speed crystal) | ESR | 90 | kΩ | 147 | |||
| Drive level (low speed crystal) | PD | 0.1 | µW | 147 | |||
| PLL lock time | LOCKTIME | 40 | µs | 147 | |||
| PLL turn-on / hop time | TOTIME | 150 | µs | Including calibration | 147 | ||
| ADC analog supply voltage | VDDA | 1.7 | 3 | 3.6 | V | 148 | |
| ADC analog supply current | IDDA, AVG | 0.55 | mA | Average current during conversion | 148 | ||
| ADC input pin voltage | VINP, iNN | -50 | mV | With input attenuator; max (VBAT+50 mV) / input attenuation V | 148 | ||
| Temperature sensor range | TRANGE | -40 | 105 | °C | 148 | ||
| Error in temperature | TERR | -4 | 0 | 4 | °C | 148 | |
| Battery level indicator range | VBLTRANGE | 1.8 | 3.6 | V | 148 | ||
| Battery level indicator error | VBLTERR | -150 | 150 | mV | After calibration | 148 | |
| Ascending brown-out threshold | VABOR | 1.68 | 1.7 | V | 148 | ||
| Descending brown-out threshold | VDBOR | 1.62 | 1.645 | V | 148 | ||
| Receiver sensitivity | RXSENS | -88 | dBm | BER <0.1% | 144 | ||
| Page erase time | 21.5 | ms | 88 | ||||
| Mass erase time | 21.5 | ms | 88 | ||||
| Program time WRITE | 44 | µs | 88 | ||||
| Supply current, sleep mode 32 kHz XO ON (DC-DC active) | IBAT | 0.9 | µA | Sleep mode: 32 kHz XO ON (24 KB retention RAM) | 141 | ||
| Supply current, active mode (DC-DC active) | IBAT | 1.9 | mA | Active mode: CPU, Flash and RAM on | 141 | ||
| Supply current RX (DC-DC active) | IBAT | 7.7 | mA | RX | 141 | ||
| Supply current TX +8 dBm (DC-DC active) | IBAT | 15.1 | mA | TX +8 dBm | 141 | ||
| Supply current TX -2 dBm (DC-DC active) | IBAT | 8.3 | mA | TX -2 dBm | 141 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | Table 31. ADC - CTRL register description: address offset ADC_BASE_ADDR+0x00, Table 130. IO functional map, Table 132. Pin characteristics, Table 153. MFT IO functions, Table 209. Absolute | 158 |
CAD (KiCad official)
- Symbol:
BLUENRG-248 - Footprint:
Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm - 3D model: QFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
bluenrg-248-etched.step/bluenrg-248-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bluenrg-248.step/bluenrg-248.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (169 pp, sha256
1191a711993a96cf, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).