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MP2303ADN-LF-Z
Public Made by Adomby adom
Monolithic Power Systems DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMP2303ADN-LF-Z
Monolithic Power Systems · DC-DC Converters · SOIC-8-EP
MP2303ADN-LF-Z from Monolithic Power Systems, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BS | power_in | High-side gate drive boost input that supplies the high-side N-channel MOSFET drive; connect a 0.01µF or greater capacitor from SW to BS. |
| 2 | IN | power_in | Power input that supplies the IC and the step-down converter switches; drive with a 4.7V to 28V source and bypass to GND with a suitably large capacitor. |
| 3 | SW | power_out | Power switching output that supplies power to the output through the LC filter; a capacitor is required from SW to BS to power the high-side switch. |
| 4 | GND | power_in | Ground; the exposed pad must be connected to pin 4. |
| 5 | FB | input | Feedback input that senses the output through a resistive divider, with a feedback threshold of 0.80V. |
| 6 | COMP | passive | Compensation node for the control loop, connected through a series RC network to GND, with an additional capacitor sometimes required. |
| 7 | EN | input | Enable input that turns the regulator on when driven high and off when driven low; it must not be left floating and should not exceed 6V. |
| 8 | SS | passive | Soft-start control input where a capacitor to GND sets the soft-start period (0.1µF gives 15ms), and leaving it unconnected disables soft-start. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Monolithic Power Systems |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | -0.3 | 30 | V | 2 | ||
| All Other Pins | -0.3 | 6 | V | 2 | |||
| Junction Temperature | 150 | °C | 2 | ||||
| Continuous Power Dissipation SOIC8E | 2.5 | W | TA = +25°C | 2 | |||
| Lead Temperature | 260 | °C | 2 | ||||
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Input Voltage | VIN | 4.7 | 28 | V | 2 | ||
| Output Voltage | VOUT | 0.8 | 25 | V | 2 | ||
| Maximum Junction Temperature | TJ | 125 | °C | 2 | |||
| Thermal Resistance Junction-to-Ambient SOIC8E | θJA | 50 | C/W | JESD51-7, 4-layer PCB | 2 | ||
| Thermal Resistance Junction-to-Case SOIC8E | θJC | 10 | C/W | 2 | |||
| Feedback Voltage | VFB | 0.78 | 0.8 | 0.82 | V | 4.7V ≤ VIN ≤ 28V, TA = +25°C | 3 |
| Feedback Voltage | VFB | 0.765 | 0.835 | V | -40°C ≤ TA ≤ +85°C | 3 | |
| OVP Threshold Voltage | 0.9 | 0.95 | 1 | V | 3 | ||
| Error Amplifier Transconductance | GEA | 550 | 820 | 1100 | μA/V | IC = 10μA | 3 |
| Shutdown Supply Current | 0.3 | 3 | μA | VEN = 0V | 3 | ||
| Supply Current | 1.45 | 1.6 | mA | VEN = 2.7V, VFB = 1.0V | 3 | ||
| High-Side Switch Leakage Current | 0 | 10 | μA | VEN = 0V, VSW = 0V | 3 | ||
| Upper Switch Current Limit | 4.3 | 6 | A | 3 | |||
| Oscillation Frequency | Fosc1 | 310 | 360 | 410 | kHz | TA = +25°C | 3 |
| Oscillation Frequency | Fosc1 | 290 | 430 | kHz | -40°C ≤ TA ≤ +85°C | 3 | |
| Maximum Duty Cycle | DMAX | 85 | 90 | % | VFB = 0.7V | 3 | |
| EN Shutdown Threshold Voltage | VEN | 1 | 1.3 | 1.6 | V | VEN Rising | 3 |
| Input Under Voltage Lockout Threshold | UVLO | 3.6 | 3.95 | 4.3 | V | VIN rising, TA = +25°C | 3 |
| Input Under Voltage Lockout Threshold | UVLO | 3.2 | 4.5 | V | 0°C ≤ TA ≤ +70°C | 3 |
CAD (KiCad official)
- Symbol:
MP2303ADN-LF-Z - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
mp2303adn-lf-z-etched.step/mp2303adn-lf-z-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mp2303adn-lf-z.step/mp2303adn-lf-z.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Monolithic Power Systems datasheet (15 pp, sha256
d3d096df1691b37f, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).