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Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

STUSB1700YQTR

STMicroelectronics · USB ICs · QFN-24-EP(4x4)

STUSB1700YQTR from STMicroelectronics, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CC1GND	power_in	Ground reference for configuration channel 1, which must be connected to ground.
2	CC1	bidirectional	Type-C configuration channel 1 connected to receptacle A5, protected against short-to-VBUS up to 22 V.
3	VCONN	power_in	Power input for the active plug from a 5 V source or lithium battery, feeding internal VCONN switches with programmable current limit up to 600 mA.
4	CC2	bidirectional	Type-C configuration channel 2 connected to receptacle B5, protected against short-to-VBUS up to 22 V.
5	CC2GND	power_in	Ground reference for configuration channel 2, which must be connected to ground.
6	RESET	input	Active high reset input.
7	SCL	input	I2C clock input, which requires an external pull-up to the I2C master.
8	SDA	bidirectional	I2C data input/output, active low open drain, which requires an external pull-up.
9	ALERT#	output	I2C interrupt output, active low open drain, which requires an external pull-up.
10	GND	power_in	Ground.
11	VBUS_VALID	output	Active low open drain output asserted during attachment when VBUS is detected on VBUS_SENSE and within the valid operating range.
12	ATTACH	output	Active low open drain output asserted when a valid source-to-sink connection or an accessory connection is established.
13	ADDR0	input	I2C device address bit setting.
14	RP_HIGH	input	Logic level input selecting between 1.5 A and 3.0 A USB Type-C current advertising.
15	RP_DEF	input	Logic level input selecting between USB default current (500 mA or 900 mA) and USB Type-C current advertising.
16	ACC_DETECT	output	Active low open drain output asserted when an audio or debug accessory device is detected.
17	A_B_SIDE	output	Active low open drain output providing cable orientation for USB SuperSpeed mux select, with external pull-up.
18	VBUS_SENSE	input	High voltage analog input sensing VBUS presence and voltage and providing the VBUS discharge path.
19	NC	unconnected	Not connected, leave floating.
20	VBUS_EN_SRC	output	High voltage active low open drain output enabling the outgoing VBUS power path, intended to drive a PMOS directly with external pull-up.
21	VREG_1V2	power_out	1.2 V internal regulator output requiring 1 µF typ. decoupling capacitor (0.5 µF min; 10 µF max).
22	VSYS	power_in	Low power system supply input, operating within [3.0 V; 5.5 V], to be connected to ground if not used.
23	VREG_2V7	power_out	2.7 V internal regulator output requiring 1 µF typ. decoupling capacitor (0.5 µF min; 10 µF max).
24	VDD	power_in	High voltage power supply from the USB power line, operating within [4.1 V; 22 V].
25	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	QFN-24-EP(4x4)
Category	Interface ICs
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage on VDD pin	VDD			28	V		46
Supply voltage on VSYS pin	VSYS			6	V		46
High voltage on CC pins	VCC1, VCC2			22	V		46
High voltage on VBUS pins	VVBUS_EN_SRC, VVBUS_SENSE			28	V		46
Operating voltage on I/O pins	VSCL, VSDA, VALERT#, VRESET, VATTACH, VA_B_SIDE, VVBUS_VALID, VACC_DETECT, VRP_DEF, VRP_HIGH	-0.3		6	V		46
VCONN voltage	VCONN			6	V		46
Storage temperature	TSTG	-55		150	°C		46
Maximum junction temperature	TJ			145	°C		46
ESD HBM				4	kV	HBM	46
ESD CDM				1.5	kV	CDM	46
Supply voltage on VDD pin	VDD	4.1		22	V		47
Supply voltage on VSYS pin	VSYS	3		5.5	V		47
CC pins	VCC1, VCC2	0		5.5	V		47
High voltage pins	VVBUS_EN_SRC, VVBUS_SENSE	0		22	V		47
Operating voltage on I/O pins	VSCL, VSDA, VALERT#, VRESET, VATTACH, VA_B_SIDE, VVBUS_VALID, VACC_DETECT, VRP_DEF, VRP_HIGH	0		4.5	V		47
VCONN voltage	VCONN	2.7		5.5	V		47
VCONN rated current	ICONN	0.1		0.6	A	default = 0.35 A	47
Operating temperature	TA	-40		105	°C		47
CC current source IP-USB	IP-USB	-20	80	20	µA	CC pin voltage, VCC = 0 to 2.6 V, -40 °C < TA < +105 °C	48
CC current source IP-1.5	IP-1.5	-8	180	8	µA		48
CC current source IP-3.0	IP-3.0	-8	330	8	µA		48
Detection threshold 1 (Max Ra at IP-USB)	VTH0.2	0.15	0.2	0.25	V	Max Ra detection by source at IP = IP-USB	48
Detection threshold 2 (Max Ra at IP-1.5)	VTH0.4	0.35	0.4	0.45	V	Max Ra detection by source at IP = IP-1.5	48
Detection threshold 3 (Max Ra at IP-3.0)	VTH0.8	0.75	0.8	0.85	V	Max Ra detection by source at IP = IP-3.0	48
Detection threshold 4 (Max Rd at IP-USB and IP-1.5)	VTH1.6	1.5	1.6	1.65	V	Max Rd detection by source at IP = IP-USB and IP = IP-1.5	48
Detection threshold 5 (Max Rd at IP-3.0)	VTH2.6	2.45	2.6	2.75	V	Max Rd detection by source at IP-3.0, max CC voltage for connected sink	48
VCONN power path resistance	RVCONN	0.25	0.5	0.975	Ω	IVCONN = 0.2 A; -40 °C < TA < 105 °C	48
Overcurrent protection (programmable limit)	IOCP	85	100	125	mA	Programmable current limit threshold (from 100 mA to 600 mA by step of 50 mA)	48
Overcurrent protection (programmable limit)	IOCP	300	350	400	mA		49
Overcurrent protection (programmable limit)	IOCP	550	600	650	mA		49
Overvoltage protection on CC output pins	VOVP	5.9	6	6.1	V		49
Undervoltage protection on VCONN input pin (low UVLO)	VUVP	2.6	2.65	2.7	V	Low UVLO threshold	49
Undervoltage protection on VCONN input pin (high UVLO)	VUVP	4.6	4.65	4.8	V	High UVLO threshold (default)	49
Overvoltage lockout	VDDOVLO	5.8	6	6.2	V	OVLO threshold detection enabled, VDD pin supplied	49
Undervoltage lockout	VDDUVLO	3.8	3.9	4	V	UVLO threshold detection enabled, VDD pin supplied	49
VBUS presence threshold (UVLO)	VTHUSB	3.8	3.9	4	V	VSYS = 3.0 to 5.5 V	49
VBUS safe 0V threshold (vSafe0V) setting 0.6 V	VTH0V	0.5	0.6	0.7	V	VSYS = 3.0 to 5.5 V, threshold programmable from 0.6 V to 1.8 V, default VTHOV = 0.6 V	49
VBUS safe 0V threshold (vSafe0V) setting 0.9 V	VTH0V	0.8	0.9	1	V		49
VBUS safe 0V threshold (vSafe0V) setting 1.2 V	VTH0V	1.1	1.2	1.3	V		49
VBUS safe 0V threshold (vSafe0V) setting 1.8 V	VTH0V	1.7	1.8	1.9	V		49
VBUS discharge resistor	RDISUSB	600	700	800	Ω		49
VBUS discharge time to 0V (per TDISPARAM, minimum multiplier 70)	TDISUSB	70			ms	Coefficient TDISPARAM programmable by NVM, default TDISPARAM = 6, TDISUSB = 504 ms	49
VBUS discharge time to 0V (per TDISPARAM, typical multiplier 84)	TDISUSB		84		ms	Coefficient TDISPARAM programmable by NVM, default TDISPARAM = 6, TDISUSB = 504 ms	49
VBUS discharge time to 0V (per TDISPARAM, maximum multiplier 100)	TDISUSB			100	ms	Coefficient TDISPARAM programmable by NVM, default TDISPARAM = 6, TDISUSB = 504 ms	49
Current consumption (device idle as SOURCE)	IDD (SRC)		158	188	µA	Device idle as a SOURCE (not connected, no communication) VSYS @ 3.3 V VDD @ 5.0 V	48
Standby current consumption	ISTDBY		33	53	µA	Device in standby (not connected, low power) VSYS @ 3.3 V VDD @ 5.0 V	48
I2C registers loading time from NVM	TLOAD		30		ms	At power-up or after a reset	48
CC open pin voltage	VCCO		2.75		V	CC unconnected, VDD = 3.0 to 5.5 V	48
CC input impedance	RINCC		200		kΩ	Terminations off	48
High level input voltage	VIH		1.2		V	Digital input/output (SCL, SDA, ALERT#, RESET, ATTACH, A_B_SIDE, VBUS_VALID, ACC_DETECT, RP_DEF, RP_HIGH)	48
Low level input voltage	VIL		0.35		V	Digital input/output (SCL, SDA, ALERT#, RESET, ATTACH, A_B_SIDE, VBUS_VALID, ACC_DETECT, RP_DEF, RP_HIGH)	48
Low level output voltage	VOL		0.4		V	Ioh = 3 mA	49
Low level output voltage (20 V open drain output VBUS_EN_SRC)	VOL		0.4		V	Ioh = 3 mA; 20 V open drain output (VBUS_EN_SRC)	50
Junction to ambient thermal resistance	RθJA		37		°C/W		53
Junction to case thermal resistance	RθJC		5		°C/W		53

CAD (KiCad official)

Symbol: STUSB1700YQTR
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
3D model files: stusb1700yqtr-etched.step / stusb1700yqtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stusb1700yqtr.step / stusb1700yqtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (56 pp, sha256 d43d594485bae716, retrieved 2026-10-28, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF