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CD74HCT670M
Public Made by Adomby adom
Texas Instruments Shift Registers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74HCT670M
Texas Instruments · Shift Registers · SOIC-16
CD74HCT670M from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | input | Data input bit 1 of the 4-bit word to be written; HCT input load is 0.15 unit load. |
| 2 | D2 | input | Data input bit 2 of the 4-bit word to be written; HCT input load is 0.15 unit load. |
| 3 | D3 | input | Data input bit 3 of the 4-bit word to be written; HCT input load is 0.15 unit load. |
| 4 | RA1 | input | Read address input bit 1 selecting which of the four words appears at the outputs; HCT input load is 0.7 unit load. |
| 5 | RA0 | input | Read address input bit 0 selecting which of the four words appears at the outputs; HCT input load is 0.4 unit load. |
| 6 | Q3 | tri_state | Three-state data output bit 3 that drives the addressed word when RE is low and is high-impedance when RE is high. |
| 7 | Q2 | tri_state | Three-state data output bit 2 that drives the addressed word when RE is low and is high-impedance when RE is high. |
| 8 | GND | power_in | Ground supply pin. |
| 9 | Q1 | tri_state | Three-state data output bit 1 that drives the addressed word when RE is low and is high-impedance when RE is high. |
| 10 | Q0 | tri_state | Three-state data output bit 0 that drives the addressed word when RE is low and is high-impedance when RE is high. |
| 11 | RE | input | Active-low read enable; the addressed word appears at the outputs when low and the outputs are high-impedance when high (HCT input load 1.5 unit loads). |
| 12 | WE | input | Active-low write enable; when low the word is written to the addressed location and stays transparent to the data, and when high data and address inputs are inhibited (HCT input load 0.3 unit load). |
| 13 | WA1 | input | Write address input bit 1 determining the location of the stored word; HCT input load is 0.4 unit load. |
| 14 | WA0 | input | Write address input bit 0 determining the location of the stored word; HCT input load is 0.2 unit load. |
| 15 | D0 | input | Data input bit 0 of the 4-bit word to be written; HCT input load is 0.15 unit load. |
| 16 | VCC | power_in | Positive supply voltage, 4.5V to 5.5V for HCT types (absolute maximum -0.5V to 7V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD74HCT670M - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
cd74hct670m-etched.step/cd74hct670m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74hct670m.step/cd74hct670m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
bdb7c854c224658e, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).