TS9222IYDT from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	Out1	output	Channel 1 rail-to-rail output, drives up to 80 mA and capacitive loads up to 500 pF.
2	In1-	input	Channel 1 inverting input, rail-to-rail with differential input voltage limited to ±1 V.
3	In1+	input	Channel 1 non-inverting input, common mode range VCC- -0.2 V to VCC+ +0.2 V.
4	VCC-	power_in	Negative supply voltage (ground in single-supply use); total supply 2.7 V to 12 V.
5	In2+	input	Channel 2 non-inverting input, common mode range VCC- -0.2 V to VCC+ +0.2 V.
6	In2-	input	Channel 2 inverting input, rail-to-rail with differential input voltage limited to ±1 V.
7	Out2	output	Channel 2 rail-to-rail output, drives up to 80 mA and capacitive loads up to 500 pF.
8	VCC+	power_in	Positive supply voltage, 2.7 V to 12 V total supply (absolute maximum 14 V).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOIC-8
Category	Operational Amplifier/Comparator
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage	VCC			14	V		3
Differential input voltage	Vid	-1		1	V		3
Storage temperature	Tstg	-65		150	°C		3
Maximum junction temperature	Tj			150	°C		3
ESD HBM	HBM			2000	V	TS9222	3
ESD MM	MM			120	V	TS9222	3
ESD CDM	CDM			1500	V	TS9222	3
Latch-up immunity				200	mA		3
Soldering temperature				260	°C	10 sec, unleaded version	3
Thermal resistance junction to ambient SO8	Rthja		125		°C/W	SO8	3
Supply voltage	VCC	2.7		12	V		4
Common mode input voltage range	Vicm	-0.2		0.2	V	VCC- -0.2 to VCC+ +0.2 (offsets relative to rails)	4
Operating free air temperature	Toper	-40		125	°C		4
Input offset voltage	Vio			500	µV	VCC=3 V, Tamb=25°C	5
Input offset voltage	Vio			900	µV	VCC=3 V, Tmin ≤ Tamb ≤ Tmax	5
Input offset current	Iio		1	30	nA	VCC=3 V, Vout = VCC/2, Tmin ≤ Tamb ≤ Tmax	5
Input bias current	Iib		15	55	nA	VCC=3 V, Vout = VCC/2	5
Input bias current	Iib			90	nA	VCC=3 V, Tmin ≤ Tamb ≤ Tmax	5
Common mode rejection ratio	CMR	65	85		dB	VCC=3 V, Vicm from 0 to 3 V	5
Common mode rejection ratio	CMR	60			dB	VCC=3 V, Tmin ≤ Tamb ≤ Tmax	5
Supply voltage rejection ratio	SVR	75	90		dB	VCC = 2.7 to 3.3 V	5
Supply voltage rejection ratio	SVR	70			dB	VCC = 2.7 to 3.3 V, Tmin ≤ Tamb ≤ Tmax	5
Large signal voltage gain	Avd	70	200		V/mV	VCC=3 V, RL= 10 kΩ, Vout = 2 Vp-p	5
High level output voltage	VOH	2.9			V	VCC=3 V, RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax	5
High level output voltage	VOH	2.87			V	VCC=3 V, RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax	5
Low level output voltage	VOL			50	mV	VCC=3 V, RL= 10 kΩ, Tmin ≤ Tamb ≤ Tmax	5
Low level output voltage	VOL			100	mV	VCC=3 V, RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax	5
Output short circuit current	Io	50	80		mA	VCC=3 V	5
Supply current (per channel)	ICC		0.9	1.2	mA	VCC=3 V, No load, Vout = VCC/2	5
Supply current (per channel)	ICC			1.3	mA	VCC=3 V, No load, Vout = VCC/2, Tmin ≤ Tamb ≤ Tmax	5
Slew rate	SR	0.7	1.3		V/μs	VCC=3 V	5
Input offset voltage	Vio			500	µV	VCC=5 V, Tamb=25°C	6
Input offset voltage	Vio			900	µV	VCC=5 V, Tmin ≤ Tamb ≤ Tmax	6
Input offset current	Iio		1	30	nA	VCC=5 V, Vout = VCC/2, Tmin ≤ Tamb ≤ Tmax	6
Input bias current	Iib		15	55	nA	VCC=5 V, Vout = VCC/2	6
Input bias current	Iib			90	nA	VCC=5 V, Tmin ≤ Tamb ≤ Tmax	6
Common mode rejection ratio	CMR	65	85		dB	VCC=5 V, Vicm from 0 to 5 V	6
Common mode rejection ratio	CMR	60			dB	VCC=5 V, Tmin ≤ Tamb ≤ Tmax	6
Supply voltage rejection ratio	SVR	75	90		dB	VCC = 4.5 to 5.5 V	6
Supply voltage rejection ratio	SVR	70			dB	VCC = 4.5 to 5.5 V, Tmin ≤ Tamb ≤ Tmax	6
Large signal voltage gain	Avd	70	200		V/mV	VCC=5 V, RL= 10 kΩ, Vout = 2 Vp-p	6
High level output voltage	VOH	4.9			V	VCC=5 V, RL = 10 kΩ, Tmin ≤ Tamb ≤ Tmax	6
High level output voltage	VOH	4.85			V	VCC=5 V, RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax	6
Low level output voltage	VOL			50	mV	VCC=5 V, RL = 10 kΩ, Tmin ≤ Tamb ≤ Tmax	6
Low level output voltage	VOL			120	mV	VCC=5 V, RL = 600 Ω, Tmin ≤ Tamb ≤ Tmax	6
Output short circuit current	Io	50	80		mA	VCC=5 V	6
Supply current (per channel)	Icc		0.9	1.2	mA	VCC=5 V, No load, Vout = VCC/2	6
Supply current (per channel)	Icc			1.3	mA	VCC=5 V, No load, Vout = VCC/2, Tmin ≤ Tamb ≤ Tmax	6
Slew rate	SR	0.7	1.3		V/μs	VCC=5 V	6
Input offset voltage drift	ΔVio/ΔT		2		μV/°C	VCC=5 V	6
Gain bandwidth product	GBP		4		MHz	VCC=5 V, RL = 10 kΩ, CL = 100 pF	6

CAD (KiCad official)

Symbol: TS9222IYDT
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: ts9222iydt-etched.step / ts9222iydt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ts9222iydt.step / ts9222iydt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (16 pp, sha256 0b0aa6adf14a8a1d, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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TS9222IYDT

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