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SN74LVC245

Texas Instruments · Bus transceiver / level translator · TSSOP-20

Eight-bit bidirectional bus transceiver that moves a byte between two buses under a single direction pin (DIR), with a 3-state output-enable (OE) to park the bus. Running from 1.65 to 3.6 V with 5 V-tolerant inputs, it doubles as a one-way level translator from 5 V logic down to 3.3 V, a common use on mixed-voltage boards. The outputs drive real bus loads at speed. A standard octal buffer/translator for parallel buses and port expansion.

Pinout

Pin Name Type Function
1 DIR input Direction control. When high, signal propagates from A to B; when low, signal propagates from B to A. CMOS input with VIH ≈ 0.65·VCC / VIL ≈ 0.35·VCC.
2 A1 bidirectional Transceiver I/O pin, port A channel 1. Driven when DIR=L and /OE=L; receives when DIR=H. Hi-Z when /OE=H. IOL/IOH up to 24 mA at VCC=3 V.
3 A2 bidirectional Transceiver I/O pin, port A channel 2. Driven when DIR=L and /OE=L; receives when DIR=H.
4 A3 bidirectional Transceiver I/O pin, port A channel 3. Driven when DIR=L and /OE=L; receives when DIR=H.
5 A4 bidirectional Transceiver I/O pin, port A channel 4. Driven when DIR=L and /OE=L; receives when DIR=H.
6 A5 bidirectional Transceiver I/O pin, port A channel 5. Driven when DIR=L and /OE=L; receives when DIR=H.
7 A6 bidirectional Transceiver I/O pin, port A channel 6. Driven when DIR=L and /OE=L; receives when DIR=H.
8 A7 bidirectional Transceiver I/O pin, port A channel 7. Driven when DIR=L and /OE=L; receives when DIR=H.
9 A8 bidirectional Transceiver I/O pin, port A channel 8. Driven when DIR=L and /OE=L; receives when DIR=H.
10 GND power_in Ground reference (0 V) for all internal logic and I/O.
11 B8 bidirectional Transceiver I/O pin, port B channel 8. Driven when DIR=H and /OE=L; receives when DIR=L.
12 B7 bidirectional Transceiver I/O pin, port B channel 7. Driven when DIR=H and /OE=L; receives when DIR=L.
13 B6 bidirectional Transceiver I/O pin, port B channel 6. Driven when DIR=H and /OE=L; receives when DIR=L.
14 B5 bidirectional Transceiver I/O pin, port B channel 5. Driven when DIR=H and /OE=L; receives when DIR=L.
15 B4 bidirectional Transceiver I/O pin, port B channel 4. Driven when DIR=H and /OE=L; receives when DIR=L.
16 B3 bidirectional Transceiver I/O pin, port B channel 3. Driven when DIR=H and /OE=L; receives when DIR=L.
17 B2 bidirectional Transceiver I/O pin, port B channel 2. Driven when DIR=H and /OE=L; receives when DIR=L.
18 B1 bidirectional Transceiver I/O pin, port B channel 1. Driven when DIR=H and /OE=L; receives when DIR=L.
19 ~{OE} input Active-low output enable. When low, the selected direction drivers are active; when high, both A and B port outputs are placed in high-impedance (Hi-Z).
20 VCC power_in Positive supply. Recommended operating range 1.65 V to 3.6 V. Inputs are 5.5 V-tolerant regardless of VCC. Decouple with 0.1 µF close to the pin.

Key specifications

Parameter Value
Type Octal bus transceiver (3-state)
Bits 8, bidirectional
Direction DIR pin
Output enable OE (active low)
Supply 1.65-3.6 V
Input tolerance 5 V-tolerant
Package TSSOP-20

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC245APWR (TSSOP-20)
  • SN74LVC245ADWR (SOIC-20)
  • SN74LVC245ARGYR (VQFN-20)

CAD (KiCad official)

  • Symbol: Logic_LevelTranslator:SN74LVC245APW (KiCad official)
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (35 pp, sha256 f8c28b30ab2bf1a0, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF