component
MCP1321T-46LE
Public Made by Adomby adom
Microchip Tech Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP1321T-46LE
Microchip Tech · Supervisor And Reset ICs · SOT-23-5
MCP1321T-46LE from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | output | Open-drain active-low reset output that goes low when VDD falls below VTRIP, when the WDI timer times out, or during power-up, and requires an external pull-up resistor on this device. |
| 2 | VSS | power_in | Ground reference for the device. |
| 3 | RST | output | Push-pull active-high reset output that goes high when VDD falls below VTRIP, when the WDI timer times out, or during power-up, and is driven low after the reset delay expires. |
| 4 | WDI | input | Watchdog timer input (Schmitt trigger) where an edge transition resets the WDT counter, the first falling edge starts it, and the standard time-out is 1.6 s typical. |
| 5 | VDD | power_in | Positive supply for the device, which is also the voltage monitored by the reset comparator; the device operates from 1.0 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage range | VDD | 1 | 5.5 | V | 3 | ||
| Specified VDD value to VOUT low | VDD | 1 | V | I RST = 10 µA, V RST < 0.3V | 3 | ||
| Operating current, watchdog timer active | IDD | 5 | 10 | µA | Watchdog Timer Active | 3 | |
| Operating current, watchdog timer inactive | IDD | 1 | 2 | µA | Watchdog Timer Inactive | 3 | |
| Operating current, VDD below trip point | IDD | 1 | 2 | µA | VDD < VTRIP | 3 | |
| Operating current, reset delay timer active | IDD | 5 | 10 | µA | Reset Delay Timer Active | 3 | |
| VDD trip point MCP13XX-46 (+25°C) | VTRIP | 4.531 | 4.6 | 4.669 | V | TA = +25°C (Note 1) | 5 |
| VDD trip point MCP13XX-46 (-40°C to +125°C) | VTRIP | 4.485 | 4.6 | 4.715 | V | TA = -40°C to +125°C (Note 2) | 5 |
| Threshold hysteresis MCP13XX-46 (+25°C) | VHYS | 0.046 | 0.276 | V | TA = +25°C (Note 3) | 7 | |
| Threshold hysteresis MCP13XX-46 (-40°C to +125°C) | VHYS | 0.046 | 0.276 | V | TA = -40°C to +125°C | 7 | |
| VDD trip point tempco | TTPCO | -40 | 40 | ppm/°C | 5 | ||
| RST/RST low-level output voltage | VOL | 0.3 | V | IOL = 50 µA, 1.0V ≤ VDD ≤ 1.5V | 8 | ||
| Open-drain high voltage on output | VODH | 13.5 | V | Open-drain output pin only, VDD = 3.0V, voltage > 5.5V applied ≤ 100 µs, current into pin limited to 2 mA, +25°C operation recommended (Note 4, Note 5) | 8 | ||
| Input leakage current (WDI) | IIL | -1 | 1 | µA | VSS ≤ VPIN ≤ VDD | 8 | |
| Open-drain output leakage current | IOD | 0.003 | 1 | µA | 8 | ||
| WDI pin pull-up resistance | RPU | 52 | kΩ | VDD = 5.5V | 8 | ||
| Input pin capacitance (WDI) | CI | 100 | pF | 8 | |||
| Output pin capacitive loading (RST, RST) | CO | 50 | pF | Tester loading to meet the AC timing specifications | 8 | ||
| Reset active time (standard time-out) | tRST | 140 | 200 | 280 | ms | Standard Time Out | 9 |
| WDI pulse width | tWP | 50 | ns | 10 | |||
| Watchdog time-out period (standard time-out) | tWD | 1.12 | 1.6 | 2.4 | sec | Standard Time Out | 10 |
| Specified temperature range | TA | -40 | 125 | °C | Except MCP13XX-25 (or below) | 11 | |
| Maximum junction temperature | TJ | 150 | °C | 11 | |||
| Storage temperature range | TA | -65 | 150 | °C | 11 | ||
| Supply voltage (VDD to VSS) | 7 | V | 3 | ||||
| Input current (VDD) | 10 | mA | 3 | ||||
| Output current (RST) | 10 | mA | 3 | ||||
| Voltage on inputs and outputs except open-drain RST, w.r.t. VSS | -0.6 | V | Upper limit printed as VDD + 1.0V | 3 | |||
| Voltage on open-drain RST (no internal pull-up), w.r.t. VSS | -0.6 | 13.5 | V | Open-drain RST with no internal pull-up resistor | 3 | ||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| Thermal resistance, 5L-SOT-23 | θJA | 220.7 | °C/W | 11 |
CAD (KiCad official)
- Symbol:
MCP1321T-46LE - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
mcp1321t-46le-etched.step/mcp1321t-46le-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp1321t-46le.step/mcp1321t-46le.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (54 pp, sha256
f313bca289b277f3, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).