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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

BQ25892RTWR

Texas Instruments · Battery Management · WQFN-24-EP(4x4)

BQ25892RTWR from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBUS	power_in	Charger input voltage accepting 3.9V to 14V input range with internal reverse-blocking MOSFET (RBFET) connected between VBUS and PMID.
2	PSEL	input	Power source selection digital input: high indicates USB host source (500mA), low indicates adapter source (3.25A).
3	PG	output	Open drain active low power good indicator pulsing low when VBUS is within operating range above sleep threshold with source current exceeding 30mA.
4	STAT	output	Open drain charge status output indicating charging in progress (low), charging complete or disabled (high), or fault condition (blinking at 1Hz).
5	SCL	input	I2C interface clock input requiring 10kΩ pull-up to logic rail for serial communication at 100kHz to 400kHz.
6	SDA	bidirectional	I2C interface bidirectional data line requiring 10kΩ pull-up to logic rail supporting standard and fast mode I2C protocols.
7	INT	output	Open-drain interrupt output pulsing low for 256µs to notify host of charger device status changes or fault events.
8	OTG	input	Active high digital input enabling boost mode when OTG_CONFIG=1 for USB On-The-Go operation supporting up to 2.4A output current.
9	CE	input	Active low digital input enabling battery charging when CHG_CONFIG=1 and CE pin is low for up to 5A fast charge current.
10	ILIM	input	Analog current limit input regulating ILIM voltage at 0.8V for maximum input current IINMAX = KILIM/RILIM ranging from 100mA to 3.25A.
11	TS	input	Analog temperature sense input accepting negative temperature coefficient thermistor (103AT recommended) for JEITA-compliant charging monitoring 0°C to 60°C.
12	QON	input	Digital input with 200kΩ internal pull-up enabling BATFET when low for ≥1.25s to exit shipping mode or ≥12s to trigger full system reset.
13	BAT	power_in	Battery positive terminal connection point for single-cell Li-Ion or Li-polymer battery up to 4.608V with integrated BATFET providing 11mΩ on-resistance.
14	BAT	power_in	Battery positive terminal connection point for single-cell Li-Ion or Li-polymer battery up to 4.608V with integrated BATFET providing 11mΩ on-resistance.
15	SYS	power_out	System power output connection point maintaining minimum system voltage regulation (3.0V to 3.7V above ground) supporting up to 5A continuous output current.
16	SYS	power_out	System power output connection point maintaining minimum system voltage regulation (3.0V to 3.7V above ground) supporting up to 5A continuous output current.
17	PGND	power_in	Power ground connection for high-current buck converter switching node, internally connected to LSFET source requiring direct ground connection.
18	PGND	power_in	Power ground connection for high-current buck converter switching node, internally connected to LSFET source requiring direct ground connection.
19	SW	power_in	Switching node output connecting to LC filter inductor, internally connected to HSFET source and LSFET drain with bootstrap capacitor connection to BTST.
20	SW	power_in	Switching node output connecting to LC filter inductor, internally connected to HSFET source and LSFET drain with bootstrap capacitor connection to BTST.
21	BTST	power_in	Bootstrap supply for high-side MOSFET gate drive connected to bootstrap diode anode requiring 47nF capacitor to SW for proper gate drive operation.
22	REGN	power_out	PWM low-side driver supply output and TS pin bias rail regulated at 4.7V to 6.4V with 50mA current limit, requiring 4.7µF output capacitor to ground.
23	PMID	output	Intermediate power node output connected to reverse-blocking MOSFET (RBFET) drain and high-side MOSFET (HSFET) drain requiring 1µF capacitor to PGND.
24	NC	unconnected	No connect pin; exposed PowerPAD beneath IC for thermal dissipation requiring solder connection to board ground with vias to ground plane.
25	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	WQFN-24-EP(4x4)
Category	Power Management (PMIC)
Pins	25

CAD (KiCad official)

Symbol: BQ25892RTWR
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
3D model files: bq25892rtwr-etched.step / bq25892rtwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq25892rtwr.step / bq25892rtwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (70 pp, sha256 2e8c133466478bb3, retrieved 2026-09-24, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF