component
SY5018BFAC
Public Made by Adomby adom
Silergy Corp LED Drivers, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSY5018BFAC
Silergy Corp · LED Drivers · SO-8
SY5018BFAC from Silergy Corp, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | passive | Loop compensation pin; an RC network is connected between this pin and GND to stabilize the control loop, with a 3.6 V absolute maximum rating. |
| 2 | CLIM | passive | Output current limit setting pin; a 220 nF ceramic capacitor to GND sets the output current limit to about 1.2 times the rated current, and tying the pin to GND disables the function, with a 3.6 V absolute maximum rating. |
| 3 | ISEN | input | Current limit sense pin with a 3.6 V absolute maximum rating; the datasheet gives a current limit voltage of 0.4 V when VSEN is below 0.2 V and 1.0 V when VSEN is between 0.2 V and 1.0 V, and a maximum current voltage of 1.5 V. |
| 4 | GND | power_in | Ground pin for the controller. |
| 5 | DRV | output | Gate driver output that connects to the primary MOSFET gate through a resistor, with typical source current of 100 mA and typical sink current of 500 mA, a 12 V gate drive voltage, and a -0.3 V to 36 V absolute range. |
| 6 | VIN | power_in | Power supply pin with a recommended operating range of 9 V to 22 V, a VIN turn-on threshold of 21.5 V, a turn-off threshold of 7.5 V, and a -0.3 V to 36 V absolute range. |
| 7 | VSEN | input | Output voltage and inductor current zero-detection input that receives the auxiliary winding voltage through a resistor divider, with an absolute range of -0.3 V to VIN + 0.3 V. |
| 8 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Silergy Corp |
| Package | SO-8 |
| Category | LED Drivers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 9 | 22 | V | 4 | ||
| Min ON Time | tON_MIN | 0.4 | µs | 4 | |||
| Maximum switching frequency | fMAX | 100 | kHz | 4 | |||
| Max ON Time | tON_MAX | 10 | µs | Vcomp=2.5V | 4 | ||
| Maximum Current Voltage | VISEN_EX | 1.5 | V | 4 | |||
| VIN, DRV absolute maximum | -0.3 | 36 | V | 3 | |||
| Supply current | IVIN | 20 | mA | 3 | |||
| VSEN | VSEN | -0.3 | V | 3 | |||
| ISEN, COMP, CLIM | 3.6 | V | 3 | ||||
| Power dissipation SO8 | 1.1 | W | TA = 25°C | 3 | |||
| Temperature range | -40 | 150 | °C | 3 | |||
| Lead temperature (soldering) | 260 | °C | Soldering, 10 sec | 3 | |||
| Storage temperature range | -65 | 150 | °C | 3 | |||
| VIN, DRV recommended operating | 9 | 22 | V | 3 | |||
| Absolute maximum range (listed under Recommended Operating Conditions) | -40 | 150 | °C | 3 | |||
| VIN working voltage (design recommendation) | VIN | 10 | 20 | V | Working voltage of VIN pin in design flow | 9 | |
| Minimum switching frequency (design recommendation) | fS_MIN | 70 | kHz | Whole input voltage range | 8 | ||
| VIN turn-on threshold | VIN_ON | 21.5 | V | 4 | |||
| VIN turn-off threshold | VIN_OFF | 7.5 | V | 4 | |||
| VIN OVP voltage | VIN_OVP | 24.5 | V | 4 | |||
| Start up current | IST | 5 | µA | VIN < VIN_OFF | 4 | ||
| Operating current | IVIN | 1 | mA | CL=100pF, f=15kHz | 4 | ||
| Shunt current in OVP mode | IVIN_OVP | 2.5 | mA | VIN > VIN_OVP | 4 | ||
| Current limit voltage | VISEN_LIMIT | 0.4 | V | VSEN < 0.2V | 4 | ||
| Current limit voltage | VISEN_LIMIT | 1 | V | 1.0V > VSEN > 0.2V | 4 | ||
| VFB at fast start up | VFB_LOW | 1 | V | 4 | |||
| Internal reference voltage | VREFV | 1.25 | V | 4 | |||
| Threshold value of Max VFB | VFB_HIGH | 1.4 | V | 4 | |||
| OVP voltage threshold | VSEN_OVP | 1.5 | V | 4 | |||
| Blanking time for OFF time | tOFF_MIN1 | 1.7 | µs | VISEN_HOLD=0.15V | 4 | ||
| Blanking time for OFF time | tOFF_MIN2 | 2.6 | µs | VISEN_HOLD=0.40V | 4 | ||
| Gate driver voltage | VGate | 12 | V | 4 | |||
| Typical source current | ISOURCE | 100 | mA | 4 | |||
| Typical sink current | ISINK | 500 | mA | 4 | |||
| Output current limit | VCLIM | 0.33 | V | 4 | |||
| Thermal shutdown temperature | TSD | 150 | ℃ | 4 | |||
| Package thermal resistance SO8 junction-to-ambient | θJA | 88 | °C/W | Natural convection, TA=25°C, JEDEC 51-3 board, 2oz copper (Note 2) | 3 | ||
| Package thermal resistance SO8 junction-to-case | θJC | 45 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
SY5018BFAC - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
sy5018bfac-etched.step/sy5018bfac-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sy5018bfac.step/sy5018bfac.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Silergy Corp datasheet (12 pp, sha256
3a2f100b12157b4b, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).