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SN74LV541ATPWR
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LV541ATPWR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
SN74LV541ATPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-low output enable for the first buffer group; if OE1 or OE2 is high, all corresponding outputs are placed in the high-impedance state, and OE should be tied to VCC through a pullup resistor to keep outputs high-impedance during power up or power down. |
| 2 | A1 | input | Data input to buffer channel 1, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 3 | A2 | input | Data input to buffer channel 2, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 4 | A3 | input | Data input to buffer channel 3, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 5 | A4 | input | Data input to buffer channel 4, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 6 | A5 | input | Data input to buffer channel 5, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 7 | A6 | input | Data input to buffer channel 6, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 8 | A7 | input | Data input to buffer channel 7, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 9 | A8 | input | Data input to buffer channel 8, TTL-voltage compatible with VCC of 4.5 V to 5.5 V; unused inputs must be held at VCC or GND. |
| 10 | GND | power_in | Ground reference pin for the device. |
| 11 | Y8 | tri_state | Noninverting 3-state output of channel 8 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 12 | Y7 | tri_state | Noninverting 3-state output of channel 7 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 13 | Y6 | tri_state | Noninverting 3-state output of channel 6 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 14 | Y5 | tri_state | Noninverting 3-state output of channel 5 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 15 | Y4 | tri_state | Noninverting 3-state output of channel 4 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 16 | Y3 | tri_state | Noninverting 3-state output of channel 3 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 17 | Y2 | tri_state | Noninverting 3-state output of channel 2 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 18 | Y1 | tri_state | Noninverting 3-state output of channel 1 that provides noninverted data when enabled and is high-impedance when OE1 or OE2 is high. |
| 19 | OE2 | input | Active-low output enable for the second buffer group; if OE1 or OE2 is high, all corresponding outputs are placed in the high-impedance state, and OE should be tied to VCC through a pullup resistor to keep outputs high-impedance during power up or power down. |
| 20 | VCC | power_in | Positive supply, specified for 4.5 V to 5.5 V operation with absolute maximum of 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74LV541ATPWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74lv541atpwr-etched.step/sn74lv541atpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv541atpwr.step/sn74lv541atpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
edf51e98d825a642, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).