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STM32G051C8U6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32G051C8U6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)
STM32G051C8U6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC13 | bidirectional | 5 V-tolerant FT I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with 30 pF max load and it must not source current such as driving an LED; alternate TIM1_BKIN, additional functions TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |
| 2 | PC14-OSC32_IN | bidirectional | 5 V-tolerant FT I/O with the same power-switch limits as PC13 (3 mA sink, 2 MHz / 30 pF output limit), and its additional function is the 32.768 kHz oscillator input OSC32_IN. |
| 3 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant FT I/O with the same power-switch limits as PC13 (3 mA sink, 2 MHz / 30 pF output limit), and its additional function is the 32.768 kHz oscillator output OSC32_OUT. |
| 4 | VBAT | power_in | Power supply input for the RTC, TAMP, the low-speed 32.768 kHz oscillator and backup registers when VDD is not present, specified from 1.55 V to 3.6 V. |
| 5 | VREF+ | power_in | Analog peripheral reference input or output of the internal voltage reference buffer (VREFBUF_OUT); it must equal VDDA when VDDA < 2 V and lie between 2 V and VDDA when VDDA ≥ 2 V, and may be grounded if the analog peripherals using it are not active. |
| 6 | VDD/VDDA | power_in | Main external supply for the internal regulator, the I/O ring (VDDIO1) and the analog blocks, with an operating voltage of 1.7 V to 3.6 V. |
| 7 | VSS/VSSA | power_in | Ground reference for the digital and analog domains; all voltages in the electrical characteristics are referenced to VSS. |
| 8 | PF0-OSC_IN | bidirectional | 5 V-tolerant FT I/O with no analog switch; alternate function TIM14_CH1 and additional function OSC_IN (high-speed oscillator input). |
| 9 | PF1-OSC_OUT | bidirectional | 5 V-tolerant FT I/O; additional functions OSC_OUT (high-speed oscillator output) and OSC_EN, alternate function TIM15_CH1N. |
| 10 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up (RST structure) whose default function is NRST, alternate MCO; per footnote 3 other I/Os connected to this pin need careful configuration when it is used as NRST. |
| 11 | PA0 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; alternate functions include SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT, COMP1_OUT, and additional functions COMP1_INM8, ADC_IN0, TAMP_IN2, WKUP1. |
| 12 | PA1 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; alternate functions include SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, TIM15_CH1N, I2C1_SMBA, EVENTOUT, and additional functions COMP1_INP2, ADC_IN1. |
| 13 | PA2 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; alternate functions include SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, TIM15_CH1, LPUART1_TX, COMP2_OUT, and additional functions COMP2_INM8, ADC_IN2, WKUP4, LSCO. |
| 14 | PA3 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; alternate functions include SPI2_MISO, USART2_RX, TIM2_CH4, TIM15_CH2, LPUART1_RX, EVENTOUT, and additional functions COMP2_INP2, ADC_IN3. |
| 15 | PA4 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; alternate functions include SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT, and additional functions ADC_IN4, DAC1_OUT1, RTC_OUT2. |
| 16 | PA5 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; alternate functions include SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR, EVENTOUT, and additional functions ADC_IN5, DAC1_OUT2. |
| 17 | PA6 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; alternate functions include SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, LPUART1_CTS, COMP1_OUT, and additional function ADC_IN6. |
| 18 | PA7 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, COMP2_OUT, and additional function ADC_IN7. |
| 19 | PB0 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; alternate functions include SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, LPTIM1_OUT, COMP1_OUT, and additional function ADC_IN8. |
| 20 | PB1 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; alternate functions include TIM14_CH1, TIM3_CH4, TIM1_CH3N, LPTIM2_IN1, LPUART1_RTS_DE, EVENTOUT, and additional functions COMP1_INM6, ADC_IN9. |
| 21 | PB2 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; alternate functions include SPI2_MISO, LPTIM1_OUT, EVENTOUT, and additional functions COMP1_INP1, ADC_IN10. |
| 22 | PB10 | bidirectional | 5 V-tolerant FT_fa I/O (Fm+ capable, analog switch); alternate functions include LPUART1_RX, TIM2_CH3, SPI2_SCK, I2C2_SCL, COMP1_OUT, and additional function ADC_IN11. |
| 23 | PB11 | bidirectional | 5 V-tolerant FT_fa I/O (Fm+ capable, analog switch); alternate functions include SPI2_MOSI, LPUART1_TX, TIM2_CH4, I2C2_SDA, COMP2_OUT, and additional function ADC_IN15. |
| 24 | PB12 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; alternate functions include SPI2_NSS, LPUART1_RTS_DE, TIM1_BKIN, TIM15_BKIN, EVENTOUT, and additional function ADC_IN16. |
| 25 | PB13 | bidirectional | 5 V-tolerant FT_f I/O (Fm+ capable); alternate functions include SPI2_SCK, LPUART1_CTS, TIM1_CH1N, TIM15_CH1N, I2C2_SCL, EVENTOUT. |
| 26 | PB14 | bidirectional | 5 V-tolerant FT_f I/O (Fm+ capable); alternate functions include SPI2_MISO, TIM1_CH2N, TIM15_CH1, I2C2_SDA, EVENTOUT. |
| 27 | PB15 | bidirectional | 5 V-tolerant FT I/O; alternate functions include SPI2_MOSI, TIM1_CH3N, TIM15_CH1N, TIM15_CH2, EVENTOUT, and additional function RTC_REFIN. |
| 28 | PA8 | bidirectional | 5 V-tolerant FT I/O; alternate functions include MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT, EVENTOUT. |
| 29 | PA9 | bidirectional | 5 V-tolerant FT_f I/O (Fm+ capable) with footnote 4: PA9 and PA10 can be remapped in place of PA11 and PA12 via SYSCFG_CFGR1; alternate functions include MCO, USART1_TX, TIM1_CH2, SPI2_MISO, TIM15_BKIN, I2C1_SCL, EVENTOUT. |
| 30 | PC6 | bidirectional | 5 V-tolerant FT I/O; alternate functions include TIM3_CH1 and TIM2_CH3. |
| 31 | PC7 | bidirectional | 5 V-tolerant FT I/O; alternate functions include TIM3_CH2 and TIM2_CH4. |
| 32 | PA10 | bidirectional | 5 V-tolerant FT_f I/O (Fm+ capable) with footnote 4 remapping to PA12 default pin position; alternate functions include SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN, I2C1_SDA, EVENTOUT. |
| 33 | PA11 [PA9] | bidirectional | 5 V-tolerant FT_fa I/O (Fm+ capable, analog switch) with default mapping shown in brackets as PA9 when remapped; alternate functions include SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL, COMP1_OUT, and additional function ADC_IN15. |
| 34 | PA12 [PA10] | bidirectional | 5 V-tolerant FT_fa I/O (Fm+ capable, analog switch) with default mapping shown in brackets as PA10 when remapped; alternate functions include SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA, COMP2_OUT, and additional function ADC_IN16. |
| 35 | PA13 | bidirectional | 5 V-tolerant FT_ea I/O with analog switch and switchable diode to VDD; upon reset it is the SWDIO alternate function with the internal pull-up enabled (footnote 5), and it also carries IR_OUT and EVENTOUT, plus additional function ADC_IN17. |
| 36 | PA14-BOOT0 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; upon reset it is the SWCLK alternate function with the internal pull-down enabled (footnote 5), and it also carries USART2_TX, EVENTOUT, and additional functions ADC_IN18 and BOOT0. |
| 37 | PA15 | bidirectional | 5 V-tolerant FT I/O; alternate functions include SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT. |
| 38 | PD0 | bidirectional | 5 V-tolerant FT I/O; alternate functions include EVENTOUT, SPI2_NSS, TIM16_CH1. |
| 39 | PD1 | bidirectional | 5 V-tolerant FT I/O; alternate functions include EVENTOUT, SPI2_SCK, TIM17_CH1. |
| 40 | PD2 | bidirectional | 5 V-tolerant FT I/O; alternate functions include TIM3_ETR and TIM1_CH1N. |
| 41 | PD3 | bidirectional | 5 V-tolerant FT I/O; alternate functions include USART2_CTS, SPI2_MISO, TIM1_CH2N. |
| 42 | PB3 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; alternate functions include SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK, EVENTOUT, and additional function COMP2_INM6. |
| 43 | PB4 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function; alternate functions include SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT, and additional function COMP2_INP0. |
| 44 | PB5 | bidirectional | 5 V-tolerant FT I/O; alternate functions include SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, LPTIM1_IN1, I2C1_SMBA, COMP2_OUT, and additional function WKUP6. |
| 45 | PB6 | bidirectional | 5 V-tolerant FT_fa I/O (Fm+ capable, analog switch); alternate functions include USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL, EVENTOUT, and additional function COMP2_INP1. |
| 46 | PB7 | bidirectional | 5 V-tolerant FT_fa I/O (Fm+ capable, analog switch); alternate functions include USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, EVENTOUT, and additional functions COMP2_INM7, ADC_IN11, PVD_IN. |
| 47 | PB8 | bidirectional | 5 V-tolerant FT_f I/O (Fm+ capable); alternate functions include SPI2_SCK, TIM16_CH1, TIM15_BKIN, I2C1_SCL, EVENTOUT. |
| 48 | PB9 | bidirectional | 5 V-tolerant FT_f I/O (Fm+ capable); alternate functions include IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-48(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
STM32G051C8U6 - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32g051c8u6-etched.step/stm32g051c8u6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g051c8u6.step/stm32g051c8u6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (126 pp, sha256
773ba84c25c7d2f3, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).