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TC4427AEOA
Public Made by Adomby adom
Microchip Tech Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTC4427AEOA
Microchip Tech · Gate Drivers · SOIC-8
TC4427AEOA from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection on the SOIC package. |
| 2 | IN A | input | MOSFET driver input A is a high-impedance TTL/CMOS compatible input with 300 mV hysteresis, and its voltage must stay between (VDD + 0.3V) and (GND - 5V); ground it if the driver is unused. |
| 3 | GND | power_in | Ground is the return path for both bias current and the high peak discharge current and should be tied to a ground plane or a very short trace to the bias supply return. |
| 4 | IN B | input | MOSFET driver input B is a high-impedance TTL/CMOS compatible input with 300 mV hysteresis, and its voltage must stay between (VDD + 0.3V) and (GND - 5V); ground it if the driver is unused. |
| 5 | OUT B | output | MOSFET driver output B is a low-impedance CMOS push-pull output with pull-down and pull-up devices of equal strength. |
| 6 | VDD | power_in | Bias supply input for the driver, rated 4.5V to 18V with respect to the ground pin, and should be bypassed with local ceramic capacitors. |
| 7 | OUT A | output | MOSFET driver output A is a low-impedance CMOS push-pull output with pull-down and pull-up devices of equal strength. |
| 8 | NC | unconnected | No connection on the SOIC package. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | 22 | V | 3 | ||||
| Storage Temperature Range | TA | -65 | 150 | °C | 4 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 4 | |||
| Supply Voltage | VDD | 4.5 | 18 | V | Over operating temperature range | 3 | |
| Specified Temperature Range (E) | TA | -40 | 85 | °C | 4 | ||
| Logic '1', High Input Voltage | VIH | 2.4 | V | 3 | |||
| Logic '0', Low Input Voltage | VIL | 0.8 | V | 3 | |||
| Input Current | IIN | -1 | 1 | μA | 0V ≤ VIN ≤ VDD | 3 | |
| Input Current (second printed pair) | IIN | -10 | 10 | μA | 0V ≤ VIN ≤ VDD | 3 | |
| Low Output Voltage | VOL | 0.025 | V | DC Test | 3 | ||
| Output Resistance | RO | 8 | 11 | Ω | IOUT = 10 mA, VDD = 18V, -40°C ≤ TA ≤ +85°C | 3 | |
| Latch-Up Protection Withstand Reverse Current | IREV | 0.5 | A | Duty cycle ≤ 2%, t ≤ 300 μsec, VDD = 18V | 3 | ||
| Rise Time | tR | 29 | 40 | ns | -40°C ≤ TA ≤ +85°C | 3 | |
| Fall Time | tF | 29 | 40 | ns | -40°C ≤ TA ≤ +85°C | 3 | |
| Delay Time tD1 | tD1 | 35 | 45 | ns | -40°C ≤ TA ≤ +85°C | 3 | |
| Delay Time tD2 | tD2 | 35 | 45 | ns | -40°C ≤ TA ≤ +85°C | 3 | |
| Power Supply Current (both inputs high) | IS | 1 | 2 | mA | VIN = 3V (Both inputs) | 3 | |
| Power Supply Current (both inputs low) | IS | 0.1 | 0.2 | mA | VIN = 0V (Both inputs), VDD = 18V | 3 | |
| Thermal Resistance, 8L-SOIC | θJA | 155 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
TC4427AEOA - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tc4427aeoa-etched.step/tc4427aeoa-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tc4427aeoa.step/tc4427aeoa.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (18 pp, sha256
0dff44adc4a1c918, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).