component
TPS54352PWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS54352PWPR
Texas Instruments · DC-DC Converters · HTSSOP-16-EP
TPS54352PWPR from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply voltage, 4.5 V to 20 V; must be bypassed with a low ESR 10-µF ceramic capacitor placed as close to the device as possible (pins 1 and 2 are both VIN). |
| 2 | VIN | power_in | Input supply voltage, 4.5 V to 20 V; must be bypassed with a low ESR 10-µF ceramic capacitor placed as close to the device as possible (pins 1 and 2 are both VIN). |
| 3 | UVLO | input | Undervoltage lockout pin; an external resistive divider from VIN overrides the internal default VIN start and stop thresholds (never connect directly to VIN). |
| 4 | PWRGD | output | Open-drain power good output; a low indicates the output is below the desired output voltage, with an internal rising edge filter on the comparator output. |
| 5 | RT | input | Frequency setting pin; a resistor from RT to AGND sets the switching frequency, while grounding or floating it selects an internally preselected frequency (250 kHz grounded, 500 kHz floating). |
| 6 | SYNC | bidirectional | Bidirectional synchronization I/O; output when RT is floating or low, input on a falling edge signal when an RT resistor is used, and a 10 kΩ resistor must always be tied from SYNC to ground. |
| 7 | ENA | input | Enable pin; below 0.5 V the device stops switching, and floating the pin enables the device. |
| 8 | COMP | passive | Error amplifier output; do not connect anything to this pin. |
| 9 | VSENSE | input | Feedback pin (error amplifier inverting input). |
| 10 | AGND | power_in | Analog ground internally connected to the sensitive analog ground circuitry; connect to PGND and PowerPAD. |
| 11 | PGND | power_in | Power ground, the noisy internal ground carrying LSG driver return currents; connect to AGND and PowerPAD. |
| 12 | VBIAS | power_out | Internal 8.0-V bias voltage requiring a 1.0-µF ceramic bypass capacitor, with up to 1 mA available for external use. |
| 13 | LSG | output | Gate drive for the optional low side n-channel MOSFET; otherwise leave open and connect a schottky diode from ground to PH. |
| 14 | PH | output | Phase node; connect to the external L-C filter (pins 14 and 15 are both PH). |
| 15 | PH | output | Phase node; connect to the external L-C filter (pins 14 and 15 are both PH). |
| 16 | BOOT | passive | Bootstrap capacitor for the high side gate driver; connect a 0.1-µF ceramic capacitor from BOOT to PH. |
| 17 | PowerPAD | power_in | Exposed thermal pad; PGND and AGND pins must be connected to it for proper operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Supply Chip |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
TPS54352PWPR - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
tps54352pwpr-etched.step/tps54352pwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps54352pwpr.step/tps54352pwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
1e7f079dce00c4b2, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).