component
CD4023BM96
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4023BM96
Texas Instruments · Logic Gates · SOIC-14
CD4023BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 2A | input | Input A of NAND gate 2 (one of three inputs to the 3-input NAND gate whose output is pin 9); input is protected by an internal CMOS protection network. |
| 2 | 2B | input | Input B of NAND gate 2 (one of three inputs to the 3-input NAND gate whose output is pin 9); input is protected by an internal CMOS protection network. |
| 3 | 1A | input | Input A of NAND gate 1 (one of three inputs to the 3-input NAND gate whose output is pin 6); input is protected by an internal CMOS protection network. |
| 4 | 1B | input | Input B of NAND gate 1 (one of three inputs to the 3-input NAND gate whose output is pin 6); input is protected by an internal CMOS protection network. |
| 5 | 1C | input | Input C of NAND gate 1 (one of three inputs to the 3-input NAND gate whose output is pin 6); input is protected by an internal CMOS protection network. |
| 6 | 1Y | output | Output of 3-input NAND gate 1, driven by inputs on pins 3, 4 and 5. |
| 7 | VSS | power_in | Negative supply/ground return for the device; all internal circuitry and the CMOS input protection diodes reference this pin. |
| 8 | 2C | input | Input C of NAND gate 2 (one of three inputs to the 3-input NAND gate whose output is pin 9); input is protected by an internal CMOS protection network. |
| 9 | 2Y | output | Output of 3-input NAND gate 2, driven by inputs on pins 1, 2 and 8. |
| 10 | 3Y | output | Output of 3-input NAND gate 3, driven by inputs on pins 11, 12 and 13. |
| 11 | 3A | input | Input A of NAND gate 3 (one of three inputs to the 3-input NAND gate whose output is pin 10); input is protected by an internal CMOS protection network. |
| 12 | 3B | input | Input B of NAND gate 3 (one of three inputs to the 3-input NAND gate whose output is pin 10); input is protected by an internal CMOS protection network. |
| 13 | 3C | input | Input C of NAND gate 3 (one of three inputs to the 3-input NAND gate whose output is pin 10); input is protected by an internal CMOS protection network. |
| 14 | VDD | power_in | Positive supply voltage pin for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD4023BM96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd4023bm96-etched.step/cd4023bm96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4023bm96.step/cd4023bm96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
46a842f6da764f38, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).