component
BP6830
Public Made by Adomby adom
JSMSEMI Gate Drivers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBP6830
JSMSEMI · Gate Drivers · SOP-16
BP6830 from JSMSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN3 | input | Phase 3 high-side logic input; ON threshold min 2.9 V, OFF threshold max 0.4 V, absolute max 20 V. |
| 2 | HIN2 | input | Phase 2 high-side logic input; ON threshold min 2.9 V, OFF threshold max 0.4 V, absolute max 20 V. |
| 3 | HIN1 | input | Phase 1 high-side logic input; ON threshold min 2.9 V, OFF threshold max 0.4 V, absolute max 20 V. |
| 4 | LIN3 | input | Phase 3 low-side logic input; ON threshold min 2.9 V, OFF threshold max 0.4 V, absolute max 20 V. |
| 5 | LIN2 | input | Phase 2 low-side logic input; ON threshold min 2.9 V, OFF threshold max 0.4 V, absolute max 20 V. |
| 6 | LIN1 | input | Phase 1 low-side logic input; ON threshold min 2.9 V, OFF threshold max 0.4 V, absolute max 20 V. |
| 7 | GND | power_in | Chip ground; reference for all voltage ratings. |
| 8 | LDO5 | power_out | 5 V LDO output for powering an MCU or other chips, rated up to 40 mA (VCC 10-28 V), absolute max output voltage 6 V. |
| 9 | VCC1 | power_in | 5 V supply terminal (feeds the internal 5 V LDO per the block diagram); absolute max 40 V. |
| 10 | VCC2 | power_in | Gate-driver supply; recommended 5 V to 28 V, absolute max 40 V. |
| 11 | HO1 | output | Phase 1 high-side gate-drive output, 50 mA source / 300 mA sink; swing from VCC-15 V to VCC. |
| 12 | LO1 | output | Phase 1 low-side gate-drive output, 50 mA source / 300 mA sink; absolute max 15 V. |
| 13 | HO2 | output | Phase 2 high-side gate-drive output, 50 mA source / 300 mA sink; swing from VCC-15 V to VCC. |
| 14 | LO2 | output | Phase 2 low-side gate-drive output, 50 mA source / 300 mA sink; absolute max 15 V. |
| 15 | HO3 | output | Phase 3 high-side gate-drive output, 50 mA source / 300 mA sink; swing from VCC-15 V to VCC. |
| 16 | LO3 | output | Phase 3 low-side gate-drive output, 50 mA source / 300 mA sink; absolute max 15 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOP-16 |
| Category | Motor Driver ICs |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
BP6830 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
bp6830-etched.step/bp6830-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bp6830.step/bp6830.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JSMSEMI datasheet (7 pp, sha256
48e7fbb327ab0f2e, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).