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AD7985BCPZ

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ADI(亚德诺) , LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

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AD7985BCPZ

ADI(亚德诺) · IC · LFCSP-20(4x4)

AD7985BCPZ from ADI(亚德诺), in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF bidirectional Reference output/input voltage: with PDREF low it produces 4.096 V from the internal reference, and with PDREF high it accepts an external reference up to 5.0 V, decoupled closely to REFGND with a 10 µF capacitor.
2 REF bidirectional Reference output/input voltage: with PDREF low it produces 4.096 V from the internal reference, and with PDREF high it accepts an external reference up to 5.0 V, decoupled closely to REFGND with a 10 µF capacitor.
3 REFGND power_in Reference input analog ground, to which REF is referred and which must be decoupled closely to REF.
4 REFGND power_in Reference input analog ground, to which REF is referred and which must be decoupled closely to REF.
5 IN− input Analog input ground sense, to be connected to the analog ground plane or a remote ground sense.
6 IN+ input Analog input referred to IN-, with the input voltage range (IN+ minus IN-) of 0 V to VREF.
7 PDREF input Internal reference power-down input: low enables the internal reference, and high powers it down so an external reference must be used.
8 VIO power_in Input/output interface digital power, nominally at the host interface supply of 1.8 V, 2.5 V, or 2.7 V.
9 SDO output Serial data output on which the conversion result is output, synchronized to SCK.
10 DGND power_in Digital power ground.
11 DVDD power_in Digital power, nominally at 2.5 V.
12 SCK input Serial data clock input that shifts out the conversion result when the device is selected.
13 CNV input Convert input: its leading edge initiates conversions and selects chain mode or CS mode, and in chain mode data must be read while CNV is high.
14 SDI input Serial data input that selects the interface mode at the CNV rising edge: low selects chain mode (data input for daisy-chaining, output on SDO after 16 SCK cycles), high selects CS mode.
15 TURBO input Conversion mode selection: high gives maximum throughput of 2.5 MSPS without power-down between conversions, low gives 2.0 MSPS with power-down between conversions.
16 AVDD power_in Input analog power, nominally at 2.5 V.
17 AGND power_in Analog power ground.
18 AGND power_in Analog power ground.
19 BVDD power_in Reference buffer power, nominally at 5.0 V; if an external reference buffer is used, REFIN is tied to ground to power down the internal buffer and the external buffer connects to BVDD.
20 REFIN bidirectional Internal reference output or reference buffer input, producing 1.2 V typical on this pin when PDREF is low and needing 0.1 µF typical external decoupling.
21 Exposed Pad unconnected Exposed pad, not connected internally, recommended to be soldered to the system ground plane for solder joint reliability.

Key specifications

Parameter Value
Manufacturer ADI(亚德诺)
Package LFCSP-20(4x4)
Category
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Differential Nonlinearity Error DNL -0.99 0.5 0.99 LSB 3
Integral Nonlinearity Error INL -1.5 0.7 1.5 LSB 3
Gain Error, TMIN to TMAX -15 2 15 LSB TMIN to TMAX 3
Gain Error Temperature Drift -0.8 0.8 ppm/°C printed ±0.8 3
Zero Error, TMIN to TMAX -0.99 0.08 0.99 mV TMIN to TMAX 3
Power Supply Sensitivity 90 dB AVDD = 2.5 V ± 5% 3
Dynamic Range 87.5 89 dB VREF = 4.096 V, internal reference 3
Dynamic Range 89 90 dB VREF = 5.0 V, external reference 3
Signal-to-Noise Ratio SNR 87 88.5 dB fIN = 20 kHz, VREF = 4.096 V, internal reference 3
Signal-to-Noise Ratio SNR 89 90 dB fIN = 20 kHz, VREF = 5.0 V, external reference 3
Spurious-Free Dynamic Range SFDR 103 dB fIN = 20 kHz 3
Total Harmonic Distortion THD -100 dB fIN = 20 kHz, VREF = 4.096 V, internal reference 3
Signal-to-Noise-and-Distortion Ratio SINAD 90 dB fIN = 20 kHz, VREF = 4.096 V 3
Conversion Rate 0 2.5 MSPS 3
Transient Response 100 ns Full-scale step 3
Absolute Input Voltage IN+ -0.1 V max VREF + 0.1 V as printed 3
Absolute Input Voltage IN- -0.1 0.1 V 3
Leakage Current at 25°C 250 nA Acquisition phase 3
Voltage Range (IN+) - (IN-) 0 V max VREF 3
Conversion Time: CNV Rising Edge to Data Available tCONV 320 ns Turbo mode 5
Conversion Time: CNV Rising Edge to Data Available tCONV 420 ns Normal mode 5
Acquisition Time tACQ 80 ns 5
CNV Pulse Width tCNVH 10 ns CS mode 5
Data Read During Conversion tDATA 190 ns Turbo mode 5
Data Read During Conversion tDATA 290 ns Normal mode 5
Quiet Time During Acquisition from Last SCK Falling Edge to CNV Rising Edge tQUIET 20 ns 5
SCK Period tSCK 9 ns CS mode 5
SCK Period tSCK 11 ns Chain mode 5
SCK Low Time tSCKL 3.5 ns 5
SCK High Time tSCKH 3.5 ns 5
SCK Falling Edge to Data Remains Valid tHSDO 2 ns 5
SCK Falling Edge to Data Valid Delay tDSDO 4 ns 5
CNV or SDI Low to SDO D15 MSB Valid tEN 5 ns 5
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance tDIS 8 ns CS mode 5
SDI Valid Setup Time from CNV Rising Edge tSSDICNV 4 ns 5
SDI Valid Hold Time from CNV Rising Edge tHSDICNV 0 ns CS mode 5
SCK Valid Setup Time from CNV Rising Edge tSSCKCNV 5 ns Chain mode 5
SCK Valid Hold Time from CNV Rising Edge tHSCKCNV 5 ns Chain mode 5
SDI Valid Setup Time from SCK Falling Edge tSSDISCK 2 ns Chain mode 5
SDI Valid Hold Time from SCK Falling Edge tHSDISCK 3 ns Chain mode 5
SDI High to SDO High tDSDOSDI 15 ns Chain mode with busy indicator 5
Analog Inputs IN+, IN- to GND -0.3 V max VREF + 0.3 V, or ±130 mA 6
REF, BVDD to GND, REFGND -0.3 6 V 6
AVDD, DVDD, VIO to GND -0.3 2.7 V 6
AVDD, DVDD to VIO -6 3 V 6
Digital Inputs to GND -0.3 V max VIO + 0.3 V 6
Digital Outputs to GND -0.3 V max VIO + 0.3 V 6
Storage Temperature Range -65 150 °C 6
Junction Temperature 150 °C 6
Lead Temperature, Vapor Phase 215 °C 60 sec 6
Lead Temperature, Infrared 220 °C 15 sec 6
Operating Temperature Range TA -40 85 °C 3
Interface Supply Voltage VIO 1.8 2.7 V 3
Internal Reference Voltage Deviation from 4.096 V -15 15 mV internal reference, printed ±15 mV 16
Internal Reference Temperature Drift -10 10 ppm/°C internal 4.096 V reference, typical drift 16
Junction-to-Ambient Thermal Impedance, 20-Lead LFCSP θJA 30.4 °C/W 20-lead LFCSP 6

CAD (KiCad official)

  • Symbol: AD7985BCPZ
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)
  • 3D model files: ad7985bcpz-etched.step / ad7985bcpz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7985bcpz.step / ad7985bcpz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ADI(亚德诺) datasheet (28 pp, sha256 5831a023f8982c83, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF