component
AD5672RBCPZ-REEL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DACs), LFCSP-20(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD5672RBCPZ-REEL7
Analog Devices · Digital To Analog Converters (DACs) · LFCSP-20(4x4)
AD5672RBCPZ-REEL7 from Analog Devices, in a LFCSP-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply input; the device operates from 2.7 V to 5.5 V and VDD should be decoupled with a 10 µF capacitor in parallel with a 0.1 µF capacitor to GND. |
| 2 | VLOGIC | power_in | Digital power supply; the voltage on this pin ranges from 1.62 V to 5.5 V. |
| 3 | SYNC | input | Active-low frame synchronization input; when SYNC goes low, data transfers in on the falling edges of the next 24 clocks. |
| 4 | SCLK | input | Serial clock input; data is clocked into the input shift register on the falling edge of SCLK at rates of up to 50 MHz. |
| 5 | SDI | input | Serial data input to the 24-bit input shift register, clocked in on the falling edge of SCLK. |
| 6 | VOUT7 | output | Analog output voltage from DAC 7; the output amplifier has rail-to-rail operation. |
| 7 | VOUT6 | output | Analog output voltage from DAC 6; the output amplifier has rail-to-rail operation. |
| 8 | VOUT5 | output | Analog output voltage from DAC 5; the output amplifier has rail-to-rail operation. |
| 9 | VOUT4 | output | Analog output voltage from DAC 4; the output amplifier has rail-to-rail operation. |
| 10 | NIC | unconnected | No internal connection. |
| 11 | GND | power_in | Ground reference point for all circuitry on the device. |
| 12 | LDAC | input | Load DAC input; pulsing low updates any or all DAC registers that have new input data so all outputs update simultaneously, and the pin can be tied permanently low. |
| 13 | SDO | output | Serial data output used for daisy-chaining or readback; data transfers on the rising edge of SCLK and is valid on the falling edge. |
| 14 | RESET | input | Asynchronous reset input that is falling-edge sensitive; while RESET is low all LDAC pulses are ignored, and activation loads the input and DAC registers with zero scale or midscale per the RSTSEL state. |
| 15 | VREF | power_in | Reference voltage input/output; it is the reference output by default and becomes an external reference input when the internal reference is disabled. |
| 16 | NIC | unconnected | No internal connection. |
| 17 | VOUT3 | output | Analog output voltage from DAC 3; the output amplifier has rail-to-rail operation. |
| 18 | VOUT2 | output | Analog output voltage from DAC 2; the output amplifier has rail-to-rail operation. |
| 19 | VOUT1 | output | Analog output voltage from DAC 1; the output amplifier has rail-to-rail operation. |
| 20 | VOUT0 | output | Analog output voltage from DAC 0; the output amplifier has rail-to-rail operation. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | LFCSP-20(4x4) |
| Category | ADC/DAC/Data Conversion |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative Accuracy (INL), Gain = 1 | -1 | 0.12 | 1 | LSB | Gain = 1 | 4 | |
| Relative Accuracy (INL), Gain = 2 | -1 | 0.12 | 1 | LSB | Gain = 2 | 4 | |
| Differential Nonlinearity (DNL), Gain = 1 | -0.1 | 0.01 | 0.1 | LSB | Gain = 1 | 4 | |
| Differential Nonlinearity (DNL), Gain = 2 | -0.1 | 0.01 | 0.1 | LSB | Gain = 2 | 4 | |
| Zero Code Error | 0.8 | 1.6 | mV | Gain = 1 or gain = 2 | 4 | ||
| Offset Error, Gain = 1 | -2 | -0.75 | 2 | mV | Gain = 1 | 4 | |
| Offset Error, Gain = 2 | -1.5 | -0.1 | 1.5 | mV | Gain = 2 | 4 | |
| Full-Scale Error, Gain = 1 | -0.14 | -0.018 | 0.14 | % of FSR | Gain = 1 | 4 | |
| Full-Scale Error, Gain = 2 | -0.07 | -0.013 | 0.07 | % of FSR | Gain = 2 | 4 | |
| Gain Error, Gain = 1 | -0.12 | 0.04 | 0.12 | % of FSR | Gain = 1 | 4 | |
| Gain Error, Gain = 2 | -0.06 | -0.02 | 0.06 | % of FSR | Gain = 2 | 4 | |
| Total Unadjusted Error (TUE), Gain = 1 | TUE | -0.18 | 0.03 | 0.18 | % of FSR | Gain = 1 | 4 |
| Total Unadjusted Error (TUE), Gain = 2 | TUE | -0.14 | 0.006 | 0.14 | % of FSR | Gain = 2 | 4 |
| Offset Error Drift | -1 | 1 | µV/°C | 4 | |||
| Output Voltage Range, Gain = 1 | 0 | 2.5 | V | Gain = 1 | 4 | ||
| Output Voltage Range, Gain = 2 | 0 | 5 | V | Gain = 2 | 4 | ||
| Capacitive Load Stability | 2 | nF | RL = ∞ | 4 | |||
| Capacitive Load Stability | 10 | nF | RL = 1 kΩ | 4 | |||
| Output Current Load Capability | -20 | 20 | mA | VDD ≥ 3 V | 4 | ||
| Reference Output Voltage | 2.4975 | 2.5025 | V | 4 | |||
| Reference Temperature Coefficient | 2 | 5 | ppm/°C | See the Terminology section | 4 | ||
| Input Current | -1 | 1 | µA | Per pin | 5 | ||
| Input Voltage Low | VIL | 0.3 | × VLOGIC | 5 | |||
| Input Voltage High | VIH | 0.7 | × VLOGIC | 5 | |||
| Output Voltage Low | VOL | 0.4 | V | IOL = 200 μA | 5 | ||
| Logic supply voltage | VLOGIC | 1.62 | 5.5 | V | 5 | ||
| Supply voltage, Gain = 1 | VDD | 2.7 | 5.5 | V | Gain = 1 | 5 | |
| Supply voltage, Gain = 2 | VDD | 5.5 | V | Gain = 2 | 5 | ||
| VLOGIC Supply Current, Power-on, −40°C to +105°C | ILOGIC | 1 | µA | Power-on, −40°C to +105°C | 5 | ||
| VLOGIC Supply Current, Power-on, −40°C to +125°C | ILOGIC | 1.3 | µA | Power-on, −40°C to +125°C | 5 | ||
| VLOGIC Supply Current, Power-down, −40°C to +105°C | ILOGIC | 0.5 | µA | Power-down, −40°C to +105°C | 5 | ||
| VLOGIC Supply Current, Power-down, −40°C to +125°C | ILOGIC | 1.3 | µA | Power-down, −40°C to +125°C | 5 | ||
| VDD Supply Current, Normal Mode | IDD | 1.1 | 1.26 | mA | Internal reference off, −40°C to +85°C | 5 | |
| VDD Supply Current, Normal Mode | IDD | 1.8 | 2 | mA | Internal reference on, −40°C to +85°C | 5 | |
| VDD Supply Current, Normal Mode | IDD | 1.1 | 1.3 | mA | Internal reference off | 5 | |
| VDD Supply Current, Normal Mode | IDD | 1.8 | 2.1 | mA | Internal reference on | 5 | |
| VDD Supply Current, All Power-Down Modes | IDD | 1 | 1.7 | µA | −40°C to +85°C | 5 | |
| VDD Supply Current, All Power-Down Modes | IDD | 1 | 2.5 | µA | −40°C to +105°C | 5 | |
| VDD Supply Current, All Power-Down Modes | IDD | 1 | 5.5 | µA | −40°C to +125°C | 5 | |
| VDD to GND | -0.3 | 7 | V | 12 | |||
| VLOGIC to GND | -0.3 | 7 | V | 12 | |||
| Operating Temperature Range | -40 | 125 | °C | 12 | |||
| Storage Temperature Range | -65 | 150 | °C | 12 | |||
| Junction Temperature | 125 | °C | 12 | ||||
| Reflow Soldering Peak Temperature, Pb-Free (J-STD-020) | 260 | °C | 12 | ||||
| Junction-to-ambient thermal resistance, 20-Lead LFCSP (CP-20-8) | θJA | 82 | °C/W | JEDEC 2S2P thermal test board with nine thermal vias | 12 | ||
| Junction-to-board thermal resistance, 20-Lead LFCSP (CP-20-8) | θJB | 16.67 | °C/W | JEDEC 2S2P thermal test board with nine thermal vias | 12 | ||
| Junction-to-case thermal resistance, 20-Lead LFCSP (CP-20-8) | θJC | 32.5 | °C/W | JEDEC 2S2P thermal test board with nine thermal vias | 12 | ||
| Junction-to-top characterization parameter, 20-Lead LFCSP (CP-20-8) | ΨJT | 0.43 | °C/W | JEDEC 2S2P thermal test board with nine thermal vias | 12 | ||
| Junction-to-board characterization parameter, 20-Lead LFCSP (CP-20-8) | ΨJB | 22 | °C/W | JEDEC 2S2P thermal test board with nine thermal vias | 12 |
CAD (KiCad official)
- Symbol:
AD5672RBCPZ-REEL7 - Footprint:
Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm - 3D model: LFCSP-20(4x4) (KiCad packages3D, STEP)
- 3D model files:
ad5672rbcpz-reel7-etched.step/ad5672rbcpz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5672rbcpz-reel7.step/ad5672rbcpz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (36 pp, sha256
82203c70f66724f4, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).