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Contents

README

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BLUENRG-355MC

STMicroelectronics · RF Transceiver ICs · QFN-48-EP(6x6)

BLUENRG-355MC from STMicroelectronics, in a QFN-48-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB3 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions USART_CTS, LPUART_TX, TIM1_CH4; additional functions ADC_VINP0 and wakeup.
2 PB2 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3; additional functions ADC_VINM0 and wakeup.
3 PB1 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR; additional functions ADC_VINP1 and wakeup.
4 PB0 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N; additional functions ADC_VINM1 and wakeup.
5 PA15 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions I2C2_SMBA, SPI1_MOSI, TIM1_BKIN2; additional functions ADC_VINP2 and wakeup.
6 PA14 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions I2C2_SDA, SPI1_MISO, TIM1_BKIN; additional functions ADC_VINM2 and wakeup.
7 PA13 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions I2C2_SCL, SPI1_SCK, SPI2_MISO, TIM1_ETR, I2S2_MISO; additional functions ADC_VINP3 and wakeup.
8 PA12 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions I2C1_SMBA, SPI1_NSS, SPI2_MOSI, TIM1_CH1, I2S2_SD; additional functions ADC_VINM3 and wakeup.
9 PA11 bidirectional GPIO, 5 V tolerant (FT); alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD; wakeup, GPIO in DEEPSTOP, RTC_OUT.
10 PA10 bidirectional GPIO, 5 V tolerant (FT); alternate functions LCO, SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK; BOOT (forced high during reset activates the UART bootloader), wakeup, GPIO in DEEPSTOP, LCO.
11 PA9 bidirectional GPIO, 5 V tolerant (FT); alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS; wakeup, GPIO in DEEPSTOP, LCO.
12 PA8 bidirectional GPIO, 5 V tolerant (FT); alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO; wakeup, GPIO in DEEPSTOP, RTC_OUT.
13 PA0 bidirectional GPIO, 5 V tolerant, Fm+ capable (FT_f); alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK; wakeup.
14 PA1 bidirectional GPIO, 5 V tolerant, Fm+ capable (FT_f); alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO; wakeup.
15 PA2 bidirectional GPIO, 5 V tolerant (FT); alternate functions SWDIO, USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK; wakeup.
16 PA3 bidirectional GPIO, 5 V tolerant (FT); alternate functions SWCLK, USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK; wakeup.
17 PA4 bidirectional GPIO, 5 V tolerant (FT); alternate functions LCO, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; wakeup, GPIO in DEEPSTOP, LCO.
18 PA5 bidirectional GPIO, 5 V tolerant (FT); alternate functions MCO, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; wakeup, GPIO in DEEPSTOP, LCO.
19 PA6 bidirectional GPIO, 5 V tolerant (FT); alternate functions LPUART_CTS, SPI2_MOSI, SPI2_NSS, TIM1_CH1, I2S2_SD, I2S2_WS; wakeup, GPIO in DEEPSTOP, LCO.
20 PA7 bidirectional GPIO, 5 V tolerant (FT); alternate functions LPUART_RTS_DE, SPI2_MISO, SPI2_SCK, TIM1_CH2, I2S2_MISO, I2S2_SCK; wakeup, GPIO in DEEPSTOP, RTC_OUT.
21 VDD2 power_in Supply pin, 1.7-3.6 V battery voltage input.
22 RF1 bidirectional RF input/output, 50 Ω impedance, connects to the antenna through matching network.
23 VDDRF power_in RF supply pin, 1.7-3.6 V battery voltage input.
24 OSCOUT passive 32 MHz crystal output (RF-type pin).
25 OSCIN passive 32 MHz crystal input (RF-type pin).
26 VDD4 power_in Supply pin, 1.7-3.6 V battery voltage input.
27 PB15 bidirectional GPIO, 5 V tolerant (FT); alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX.
28 PB14 bidirectional GPIO, 5 V tolerant (FT_a); alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX; additional function VIN_PVD.
29 PB13/XTAL1 bidirectional GPIO, 5 V tolerant (FT); alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4; additional function SXTAL1 (32 kHz crystal).
30 PB12/XTAL0 bidirectional GPIO, 5 V tolerant (FT); alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3; additional function SXTAL0 (32 kHz crystal).
31 VCAP power_out 1.2 V digital core supply pin, connect decoupling capacitor.
32 VFBSD passive SMPS output; connect to the L/C network, or supply voltage applied here when DC-DC is off (1.4-3.6 V feedback range).
33 NC unconnected Not connected.
34 VSS power_in SMPS ground; must be connected to the ground plane.
35 VLXSD passive SMPS input/output switching node connected to the DC-DC inductor.
36 VDDSD power_in SMPS supply pin, 1.7-3.6 V battery voltage input.
37 VDD3 power_in Supply pin, 1.7-3.6 V battery voltage input.
38 RSTN bidirectional Reset pin with weak pull-up (25-55 kΩ); active low, also the only exit from SHUTDOWN mode.
39 VDD1 power_in Supply pin, 1.7-3.6 V battery voltage input.
40 VDDA power_in 1.2 V analog ADC core supply pin (absolute maximum 1.32 V).
41 PB11 bidirectional GPIO, 5 V tolerant (FT); alternate functions SPI1_SCK, SPI2_NSS, I2C1_SCL, TIM1_CH1, TIM1_CH4N, I2S2_WS; wakeup.
42 PB10 bidirectional GPIO, 5 V tolerant (FT); alternate functions SPI1_NSS, SPI2_SCK, I2C1_SDA, TIM1_CH2, TIM1_CH3N, I2S2_SCK; wakeup.
43 PB9 bidirectional GPIO, 5 V tolerant (FT); alternate functions USART_TX, LPUART_CTS, SPI2_MCK, TIM1_CH1N, TIM1_CH2N, I2S2_MCK; wakeup.
44 PB8 bidirectional GPIO, 5 V tolerant (FT); alternate functions USART_CK, LPUART_RX, TIM1_CH4, TIM1_CH1N; wakeup.
45 PB7 bidirectional GPIO, 5 V tolerant, Fm+ capable (FT_f); alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; wakeup.
46 PB6 bidirectional GPIO, 5 V tolerant, Fm+ capable (FT_f); alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; wakeup.
47 PB5 bidirectional GPIO, 3.6 V tolerant (TT), not 5 V tolerant; alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD; additional functions PGA_VBIAS_MIC and wakeup.
48 PB4 bidirectional GPIO, 5 V tolerant (FT); alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO; additional functions PGA_VIN and wakeup.
49 GND power_in Exposed pad ground; must be connected to the ground plane.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package QFN-48-EP(6x6)
Category RF And Wireless
Pins 49

CAD (KiCad official)

  • Symbol: BLUENRG-355MC
  • Footprint: Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm
  • 3D model: QFN-48-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: bluenrg-355mc-etched.step / bluenrg-355mc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bluenrg-355mc.step / bluenrg-355mc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (73 pp, sha256 c3c8def9f2699f65, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF